That's right.

Reviewed-by: Samuel Pitoiset <samuel.pitoi...@gmail.com>

On 04/07/2018 05:59 PM, Marek Olšák wrote:
From: Marek Olšák <marek.ol...@amd.com>

CLEAR_STATE initializes them properly.
---
  src/gallium/drivers/radeonsi/si_state.c | 7 +------
  1 file changed, 1 insertion(+), 6 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_state.c 
b/src/gallium/drivers/radeonsi/si_state.c
index c4fb254..2924a72 100644
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -258,25 +258,20 @@ static void si_emit_cb_render_state(struct si_context 
*sctx, struct r600_atom *a
                                        sx_blend_opt_epsilon |= V_028758_10BIT_FORMAT 
<< (i * 4);
                                }
                                break;
                        }
                }
radeon_set_context_reg_seq(cs, R_028754_SX_PS_DOWNCONVERT, 3);
                radeon_emit(cs, sx_ps_downconvert);     /* 
R_028754_SX_PS_DOWNCONVERT */
                radeon_emit(cs, sx_blend_opt_epsilon);  /* 
R_028758_SX_BLEND_OPT_EPSILON */
                radeon_emit(cs, sx_blend_opt_control);  /* 
R_02875C_SX_BLEND_OPT_CONTROL */
-       } else if (sctx->screen->has_rbplus) {
-               radeon_set_context_reg_seq(cs, R_028754_SX_PS_DOWNCONVERT, 3);
-               radeon_emit(cs, 0);     /* R_028754_SX_PS_DOWNCONVERT */
-               radeon_emit(cs, 0);     /* R_028758_SX_BLEND_OPT_EPSILON */
-               radeon_emit(cs, 0);     /* R_02875C_SX_BLEND_OPT_CONTROL */
        }
  }
/*
   * Blender functions
   */
static uint32_t si_translate_blend_function(int blend_func)
  {
        switch (blend_func) {
@@ -621,21 +616,21 @@ static void *si_create_blend_state_mode(struct 
pipe_context *ctx,
                    dstRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA)
                        blend->need_src_alpha_4bit |= 0xfu << (i * 4);
        }
if (blend->cb_target_mask) {
                color_control |= S_028808_MODE(mode);
        } else {
                color_control |= S_028808_MODE(V_028808_CB_DISABLE);
        }
- if (sctx->screen->has_rbplus) {
+       if (sctx->screen->rbplus_allowed) {
                /* Disable RB+ blend optimizations for dual source blending.
                 * Vulkan does this.
                 */
                if (blend->dual_src_blend) {
                        for (int i = 0; i < 8; i++) {
                                sx_mrt_blend_opt[i] =
                                        
S_028760_COLOR_COMB_FCN(V_028760_OPT_COMB_NONE) |
                                        
S_028760_ALPHA_COMB_FCN(V_028760_OPT_COMB_NONE);
                        }
                }

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