Clayton Craft <clayton.a.cr...@intel.com> writes: > Quoting Iago Toral Quiroga (2018-04-30 07:18:08) >> This version addresses the feedback received to v1, which includes moving the >> bit-size lowering pass from intel to core NIR (patch 8) and a separate patch >> to add Intel's specific configuration for int16 (patch 9), and then it also >> adds a few things that were missing in the first version, namely, a fix for >> 16-bit comparisons to emit 32-bit booleans (patch 10 -a patch to optimize the >> resulting code will come later-) and 16-bit pack/unpack which is needed for >> 16-bit bitcasts (patches 11-15). >> > Since this patch series was merged, we are seeing a number of failures in CI > on > BSW, GLK, and BXT platforms: > > dEQP-VK.spirv_assembly.instruction.compute.sconvert.int16_to_int64 > dEQP-VK.spirv_assembly.instruction.compute.uconvert.uint16_to_uint64 > dEQP-VK.spirv_assembly.instruction.compute.sconvert.int16_to_uint64 >
I've reverted this patch, due to: https://bugs.freedesktop.org/show_bug.cgi?id=106393 We can't execute CI tests due to that bug, so I couldn't leave the patch in place. _______________________________________________ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev