From: Marek Olšák <marek.ol...@amd.com>
same as Vulkan.
---
src/gallium/drivers/radeonsi/si_blit.c | 10 ++++++++++
src/gallium/drivers/radeonsi/si_pipe.h | 2 +-
src/gallium/drivers/radeonsi/si_state_binning.c | 2 +-
3 files changed, 12 insertions(+), 2 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_blit.c
b/src/gallium/drivers/radeonsi/si_blit.c
index 6f4cd1f9044..fe059b36577 100644
--- a/src/gallium/drivers/radeonsi/si_blit.c
+++ b/src/gallium/drivers/radeonsi/si_blit.c
@@ -68,24 +68,34 @@ void si_blitter_begin(struct si_context *sctx, enum
si_blitter_op op)
util_blitter_save_fragment_sampler_states(
sctx->blitter, 2,
(void**)sctx->samplers[PIPE_SHADER_FRAGMENT].sampler_states);
util_blitter_save_fragment_sampler_views(sctx->blitter, 2,
sctx->samplers[PIPE_SHADER_FRAGMENT].views);
}
if (op & SI_DISABLE_RENDER_COND)
sctx->render_cond_force_off = true;
+
+ if (sctx->screen->dpbb_allowed) {
+ sctx->dpbb_force_off = true;
+ si_mark_atom_dirty(sctx, &sctx->atoms.s.dpbb_state);
+ }
}
void si_blitter_end(struct si_context *sctx)
{
+ if (sctx->screen->dpbb_allowed) {
+ sctx->dpbb_force_off = false;
+ si_mark_atom_dirty(sctx, &sctx->atoms.s.dpbb_state);
+ }
+
sctx->render_cond_force_off = false;
/* Restore shader pointers because the VS blit shader changed all
* non-global VS user SGPRs. */
sctx->shader_pointers_dirty |= SI_DESCS_SHADER_MASK(VERTEX);
sctx->vertex_buffer_pointer_dirty = sctx->vb_descriptors_buffer != NULL;
si_mark_atom_dirty(sctx, &sctx->atoms.s.shader_pointers);
}
static unsigned u_max_sample(struct pipe_resource *r)
diff --git a/src/gallium/drivers/radeonsi/si_pipe.h
b/src/gallium/drivers/radeonsi/si_pipe.h
index 6917d5e6068..5d1671fb87f 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.h
+++ b/src/gallium/drivers/radeonsi/si_pipe.h
@@ -920,21 +920,21 @@ struct si_context {
/* Debug state. */
bool is_debug;
struct si_saved_cs *current_saved_cs;
uint64_t dmesg_timestamp;
unsigned apitrace_call_number;
/* Other state */
bool need_check_render_feedback;
bool decompression_enabled;
-
+ bool dpbb_force_off;
bool vs_writes_viewport_index;
bool vs_disables_clipping_viewport;
/* Precomputed IA_MULTI_VGT_PARAM */
union si_vgt_param_key ia_multi_vgt_param_key;
unsigned ia_multi_vgt_param[SI_NUM_VGT_PARAM_STATES];
/* Bindless descriptors. */
struct si_descriptors bindless_descriptors;
struct util_idalloc bindless_used_slots;
diff --git a/src/gallium/drivers/radeonsi/si_state_binning.c
b/src/gallium/drivers/radeonsi/si_state_binning.c
index 80b1137fd0c..2605b59bbef 100644
--- a/src/gallium/drivers/radeonsi/si_state_binning.c
+++ b/src/gallium/drivers/radeonsi/si_state_binning.c
@@ -336,21 +336,21 @@ static void si_emit_dpbb_disable(struct si_context *sctx)
void si_emit_dpbb_state(struct si_context *sctx)
{
struct si_screen *sscreen = sctx->screen;
struct si_state_blend *blend = sctx->queued.named.blend;
struct si_state_dsa *dsa = sctx->queued.named.dsa;
unsigned db_shader_control = sctx->ps_db_shader_control;
assert(sctx->chip_class >= GFX9);
- if (!sscreen->dpbb_allowed || !blend || !dsa) {
+ if (!sscreen->dpbb_allowed || !blend || !dsa || sctx->dpbb_force_off) {
si_emit_dpbb_disable(sctx);
return;
}
bool ps_can_kill = G_02880C_KILL_ENABLE(db_shader_control) ||
G_02880C_MASK_EXPORT_ENABLE(db_shader_control) ||
G_02880C_COVERAGE_TO_MASK_ENABLE(db_shader_control)
||
blend->alpha_to_coverage;
/* This is ported from Vulkan, but it doesn't make much sense to me.
--
2.17.0
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