On 17 May 2018 at 12:25, Marek Olšák <mar...@gmail.com> wrote:
> From: Marek Olšák <marek.ol...@amd.com>

LGTM,

Acked-by: Dave Airlie <airl...@redhat.com>
>
> It doesn't support GFX9.
> ---
>  .travis.yml                                   |   6 +-
>  configure.ac                                  |   4 +-
>  meson.build                                   |   4 +-
>  src/amd/common/ac_llvm_build.c                | 282 +++++++-----------
>  src/amd/common/ac_llvm_helper.cpp             |  12 -
>  src/amd/vulkan/radv_debug.c                   |   8 +-
>  src/amd/vulkan/radv_device.c                  |   9 +-
>  src/amd/vulkan/radv_nir_to_llvm.c             |   2 +-
>  .../vulkan/winsys/amdgpu/radv_amdgpu_winsys.c |   7 -
>  src/gallium/drivers/radeonsi/si_get.c         |   4 +-
>  src/gallium/drivers/radeonsi/si_pipe.c        |   2 +-
>  .../drivers/radeonsi/si_shader_tgsi_setup.c   |   3 +-
>  src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c |   7 -
>  13 files changed, 121 insertions(+), 229 deletions(-)
>
> diff --git a/.travis.yml b/.travis.yml
> index e0d6a827a6d..c8b68a66967 100644
> --- a/.travis.yml
> +++ b/.travis.yml
> @@ -116,37 +116,37 @@ matrix:
>              - x11proto-xf86vidmode-dev
>              - libexpat1-dev
>              - libx11-xcb-dev
>              - libelf-dev
>              - libunwind8-dev
>      - env:
>          - LABEL="make Gallium Drivers RadeonSI"
>          - BUILD=make
>          - MAKEFLAGS="-j4"
>          - MAKE_CHECK_COMMAND="true"
> -        - LLVM_VERSION=4.0
> +        - LLVM_VERSION=5.0
>          - LLVM_CONFIG="llvm-config-${LLVM_VERSION}"
>          - DRI_LOADERS="--disable-glx --disable-gbm --disable-egl"
>          - DRI_DRIVERS=""
>          - GALLIUM_ST="--enable-dri --disable-opencl --disable-xa 
> --disable-nine --disable-xvmc --disable-vdpau --disable-va 
> --disable-omx-bellagio --disable-gallium-osmesa"
>          - GALLIUM_DRIVERS="radeonsi"
>          - VULKAN_DRIVERS=""
>          - LIBUNWIND_FLAGS="--enable-libunwind"
>        addons:
>          apt:
>            sources:
> -            - llvm-toolchain-trusty-4.0
> +            - llvm-toolchain-trusty-5.0
>            packages:
>              # LLVM packaging is broken and misses these dependencies
>              - libedit-dev
>              # From sources above
> -            - llvm-4.0-dev
> +            - llvm-5.0-dev
>              # Common
>              - xz-utils
>              - x11proto-xf86vidmode-dev
>              - libexpat1-dev
>              - libx11-xcb-dev
>              - libelf-dev
>              - libunwind8-dev
>      - env:
>          - LABEL="make Gallium Drivers Other"
>          - BUILD=make
> diff --git a/configure.ac b/configure.ac
> index 30980151ee1..6b145f1cdb2 100644
> --- a/configure.ac
> +++ b/configure.ac
> @@ -99,22 +99,22 @@ XDAMAGE_REQUIRED=1.1
>  XSHMFENCE_REQUIRED=1.1
>  XVMC_REQUIRED=1.0.6
>  PYTHON_MAKO_REQUIRED=0.8.0
>  LIBSENSORS_REQUIRED=4.0.0
>  ZLIB_REQUIRED=1.2.3
>
>  dnl LLVM versions
>  LLVM_REQUIRED_GALLIUM=3.3.0
>  LLVM_REQUIRED_OPENCL=3.9.0
>  LLVM_REQUIRED_R600=3.9.0
> -LLVM_REQUIRED_RADEONSI=4.0.0
> -LLVM_REQUIRED_RADV=4.0.0
> +LLVM_REQUIRED_RADEONSI=5.0.0
> +LLVM_REQUIRED_RADV=5.0.0
>  LLVM_REQUIRED_SWR=4.0.0
>
>  dnl Check for progs
>  AC_PROG_CPP
>  AC_PROG_CC
>  AC_PROG_CXX
>  dnl add this here, so the help for this environmnet variable is close to
>  dnl other CC/CXX flags related help
>  AC_ARG_VAR([CXX11_CXXFLAGS], [Compiler flag to enable C++11 support (only 
> needed if not
>                                enabled by default and different  from 
> -std=c++11)])
> diff --git a/meson.build b/meson.build
> index b8ebda9cdc7..2d0f78fcdce 100644
> --- a/meson.build
> +++ b/meson.build
> @@ -1094,21 +1094,23 @@ if with_amd_vk or with_gallium_radeonsi or 
> with_gallium_r600
>    endif
>  endif
>  if with_gallium_opencl
>    llvm_modules += [
>      'all-targets', 'linker', 'coverage', 'instrumentation', 'ipo', 
> 'irreader',
>      'lto', 'option', 'objcarcopts', 'profiledata',
>    ]
>    # TODO: optional modules
>  endif
>
> -if with_amd_vk or with_gallium_radeonsi or with_gallium_swr
> +if with_amd_vk or with_gallium_radeonsi
> +  _llvm_version = '>= 5.0.0'
> +elif with_gallium_swr
>    _llvm_version = '>= 4.0.0'
>  elif with_gallium_opencl or with_gallium_r600
>    _llvm_version = '>= 3.9.0'
>  else
>    _llvm_version = '>= 3.3.0'
>  endif
>
>  _llvm = get_option('llvm')
>  if _llvm == 'auto'
>    dep_llvm = dependency(
> diff --git a/src/amd/common/ac_llvm_build.c b/src/amd/common/ac_llvm_build.c
> index 6f5f04496ee..36c1d62637b 100644
> --- a/src/amd/common/ac_llvm_build.c
> +++ b/src/amd/common/ac_llvm_build.c
> @@ -881,141 +881,105 @@ ac_build_buffer_store_dword(struct ac_llvm_context 
> *ctx,
>                             LLVMValueRef vdata,
>                             unsigned num_channels,
>                             LLVMValueRef voffset,
>                             LLVMValueRef soffset,
>                             unsigned inst_offset,
>                             bool glc,
>                             bool slc,
>                             bool writeonly_memory,
>                             bool swizzle_enable_hint)
>  {
> -       static unsigned dfmt[] = {
> -               V_008F0C_BUF_DATA_FORMAT_32,
> -               V_008F0C_BUF_DATA_FORMAT_32_32,
> -               V_008F0C_BUF_DATA_FORMAT_32_32_32,
> -               V_008F0C_BUF_DATA_FORMAT_32_32_32_32
> -       };
> +       /* Split 3 channel stores, becase LLVM doesn't support 3-channel
> +        * intrinsics. */
> +       if (num_channels == 3) {
> +               LLVMValueRef v[3], v01;
> +
> +               for (int i = 0; i < 3; i++) {
> +                       v[i] = LLVMBuildExtractElement(ctx->builder, vdata,
> +                                       LLVMConstInt(ctx->i32, i, 0), "");
> +               }
> +               v01 = ac_build_gather_values(ctx, v, 2);
> +
> +               ac_build_buffer_store_dword(ctx, rsrc, v01, 2, voffset,
> +                                           soffset, inst_offset, glc, slc,
> +                                           writeonly_memory, 
> swizzle_enable_hint);
> +               ac_build_buffer_store_dword(ctx, rsrc, v[2], 1, voffset,
> +                                           soffset, inst_offset + 8,
> +                                           glc, slc,
> +                                           writeonly_memory, 
> swizzle_enable_hint);
> +               return;
> +       }
>
>         /* SWIZZLE_ENABLE requires that soffset isn't folded into voffset
>          * (voffset is swizzled, but soffset isn't swizzled).
>          * llvm.amdgcn.buffer.store doesn't have a separate soffset parameter.
>          */
> -       if (!swizzle_enable_hint || HAVE_LLVM >= 0x0500) {
> -               /* Split 3 channel stores, becase LLVM doesn't support 
> 3-channel
> -                * intrinsics. */
> -               if (num_channels == 3) {
> -                       LLVMValueRef v[3], v01;
> -
> -                       for (int i = 0; i < 3; i++) {
> -                               v[i] = LLVMBuildExtractElement(ctx->builder, 
> vdata,
> -                                               LLVMConstInt(ctx->i32, i, 0), 
> "");
> -                       }
> -                       v01 = ac_build_gather_values(ctx, v, 2);
> -
> -                       ac_build_buffer_store_dword(ctx, rsrc, v01, 2, 
> voffset,
> -                                                   soffset, inst_offset, 
> glc, slc,
> -                                                   writeonly_memory, 
> swizzle_enable_hint);
> -                       ac_build_buffer_store_dword(ctx, rsrc, v[2], 1, 
> voffset,
> -                                                   soffset, inst_offset + 8,
> -                                                   glc, slc,
> -                                                   writeonly_memory, 
> swizzle_enable_hint);
> -                       return;
> -               }
> +       if (!swizzle_enable_hint) {
> +               LLVMValueRef offset = soffset;
> +
> +               static const char *types[] = {"f32", "v2f32", "v4f32"};
> +
> +               if (inst_offset)
> +                       offset = LLVMBuildAdd(ctx->builder, offset,
> +                                             LLVMConstInt(ctx->i32, 
> inst_offset, 0), "");
> +               if (voffset)
> +                       offset = LLVMBuildAdd(ctx->builder, offset, voffset, 
> "");
> +
> +               LLVMValueRef args[] = {
> +                       ac_to_float(ctx, vdata),
> +                       LLVMBuildBitCast(ctx->builder, rsrc, ctx->v4i32, ""),
> +                       LLVMConstInt(ctx->i32, 0, 0),
> +                       offset,
> +                       LLVMConstInt(ctx->i1, glc, 0),
> +                       LLVMConstInt(ctx->i1, slc, 0),
> +               };
>
> -               unsigned func = CLAMP(num_channels, 1, 3) - 1;
>                 char name[256];
> -
> -               if (!swizzle_enable_hint) {
> -                       LLVMValueRef offset = soffset;
> -
> -                       static const char *types[] = {"f32", "v2f32", 
> "v4f32"};
> -
> -                       if (inst_offset)
> -                               offset = LLVMBuildAdd(ctx->builder, offset,
> -                                                     LLVMConstInt(ctx->i32, 
> inst_offset, 0), "");
> -                       if (voffset)
> -                               offset = LLVMBuildAdd(ctx->builder, offset, 
> voffset, "");
> -
> -                       LLVMValueRef args[] = {
> -                               ac_to_float(ctx, vdata),
> -                               LLVMBuildBitCast(ctx->builder, rsrc, 
> ctx->v4i32, ""),
> -                               LLVMConstInt(ctx->i32, 0, 0),
> -                               offset,
> -                               LLVMConstInt(ctx->i1, glc, 0),
> -                               LLVMConstInt(ctx->i1, slc, 0),
> -                       };
> -
> -                       snprintf(name, sizeof(name), 
> "llvm.amdgcn.buffer.store.%s",
> -                                types[func]);
> -
> -                       ac_build_intrinsic(ctx, name, ctx->voidt,
> -                                          args, ARRAY_SIZE(args),
> -                                          writeonly_memory ?
> -                                          AC_FUNC_ATTR_INACCESSIBLE_MEM_ONLY 
> :
> -                                          AC_FUNC_ATTR_WRITEONLY);
> -                       return;
> -               } else {
> -                       static const char *types[] = {"i32", "v2i32", 
> "v4i32"};
> -                       LLVMValueRef args[] = {
> -                               vdata,
> -                               LLVMBuildBitCast(ctx->builder, rsrc, 
> ctx->v4i32, ""),
> -                               LLVMConstInt(ctx->i32, 0, 0),
> -                               voffset ? voffset : LLVMConstInt(ctx->i32, 0, 
> 0),
> -                               soffset,
> -                               LLVMConstInt(ctx->i32, inst_offset, 0),
> -                               LLVMConstInt(ctx->i32, dfmt[num_channels - 
> 1], 0),
> -                               LLVMConstInt(ctx->i32, 
> V_008F0C_BUF_NUM_FORMAT_UINT, 0),
> -                               LLVMConstInt(ctx->i1, glc, 0),
> -                               LLVMConstInt(ctx->i1, slc, 0),
> -                       };
> -                       snprintf(name, sizeof(name), 
> "llvm.amdgcn.tbuffer.store.%s",
> -                                types[func]);
> -
> -                       ac_build_intrinsic(ctx, name, ctx->voidt,
> -                                          args, ARRAY_SIZE(args),
> -                                          writeonly_memory ?
> -                                          AC_FUNC_ATTR_INACCESSIBLE_MEM_ONLY 
> :
> -                                          AC_FUNC_ATTR_WRITEONLY);
> -                       return;
> -               }
> +               snprintf(name, sizeof(name), "llvm.amdgcn.buffer.store.%s",
> +                        types[CLAMP(num_channels, 1, 3) - 1]);
> +
> +               ac_build_intrinsic(ctx, name, ctx->voidt,
> +                                  args, ARRAY_SIZE(args),
> +                                  writeonly_memory ?
> +                                  AC_FUNC_ATTR_INACCESSIBLE_MEM_ONLY :
> +                                  AC_FUNC_ATTR_WRITEONLY);
> +               return;
>         }
>
> -       assert(num_channels >= 1 && num_channels <= 4);
> -
> +       static const unsigned dfmt[] = {
> +               V_008F0C_BUF_DATA_FORMAT_32,
> +               V_008F0C_BUF_DATA_FORMAT_32_32,
> +               V_008F0C_BUF_DATA_FORMAT_32_32_32,
> +               V_008F0C_BUF_DATA_FORMAT_32_32_32_32
> +       };
> +       static const char *types[] = {"i32", "v2i32", "v4i32"};
>         LLVMValueRef args[] = {
> -               rsrc,
>                 vdata,
> -               LLVMConstInt(ctx->i32, num_channels, 0),
> -               voffset ? voffset : LLVMGetUndef(ctx->i32),
> +               LLVMBuildBitCast(ctx->builder, rsrc, ctx->v4i32, ""),
> +               LLVMConstInt(ctx->i32, 0, 0),
> +               voffset ? voffset : LLVMConstInt(ctx->i32, 0, 0),
>                 soffset,
>                 LLVMConstInt(ctx->i32, inst_offset, 0),
>                 LLVMConstInt(ctx->i32, dfmt[num_channels - 1], 0),
>                 LLVMConstInt(ctx->i32, V_008F0C_BUF_NUM_FORMAT_UINT, 0),
> -               LLVMConstInt(ctx->i32, voffset != NULL, 0),
> -               LLVMConstInt(ctx->i32, 0, 0), /* idxen */
> -               LLVMConstInt(ctx->i32, glc, 0),
> -               LLVMConstInt(ctx->i32, slc, 0),
> -               LLVMConstInt(ctx->i32, 0, 0), /* tfe*/
> +               LLVMConstInt(ctx->i1, glc, 0),
> +               LLVMConstInt(ctx->i1, slc, 0),
>         };
> -
> -       /* The instruction offset field has 12 bits */
> -       assert(voffset || inst_offset < (1 << 12));
> -
> -       /* The intrinsic is overloaded, we need to add a type suffix for 
> overloading to work. */
> -       unsigned func = CLAMP(num_channels, 1, 3) - 1;
> -       const char *types[] = {"i32", "v2i32", "v4i32"};
>         char name[256];
> -       snprintf(name, sizeof(name), "llvm.SI.tbuffer.store.%s", types[func]);
> +       snprintf(name, sizeof(name), "llvm.amdgcn.tbuffer.store.%s",
> +                types[CLAMP(num_channels, 1, 3) - 1]);
>
>         ac_build_intrinsic(ctx, name, ctx->voidt,
>                            args, ARRAY_SIZE(args),
> -                          AC_FUNC_ATTR_LEGACY);
> +                          writeonly_memory ?
> +                                  AC_FUNC_ATTR_INACCESSIBLE_MEM_ONLY :
> +                                  AC_FUNC_ATTR_WRITEONLY);
>  }
>
>  static LLVMValueRef
>  ac_build_buffer_load_common(struct ac_llvm_context *ctx,
>                             LLVMValueRef rsrc,
>                             LLVMValueRef vindex,
>                             LLVMValueRef voffset,
>                             unsigned num_channels,
>                             bool glc,
>                             bool slc,
> @@ -1395,80 +1359,55 @@ LLVMValueRef ac_build_imax(struct ac_llvm_context 
> *ctx, LLVMValueRef a,
>
>  LLVMValueRef ac_build_umin(struct ac_llvm_context *ctx, LLVMValueRef a,
>                            LLVMValueRef b)
>  {
>         LLVMValueRef cmp = LLVMBuildICmp(ctx->builder, LLVMIntULE, a, b, "");
>         return LLVMBuildSelect(ctx->builder, cmp, a, b, "");
>  }
>
>  LLVMValueRef ac_build_clamp(struct ac_llvm_context *ctx, LLVMValueRef value)
>  {
> -       if (HAVE_LLVM >= 0x0500) {
> -               return ac_build_fmin(ctx, ac_build_fmax(ctx, value, 
> ctx->f32_0),
> -                                    ctx->f32_1);
> -       }
> -
> -       LLVMValueRef args[3] = {
> -               value,
> -               LLVMConstReal(ctx->f32, 0),
> -               LLVMConstReal(ctx->f32, 1),
> -       };
> -
> -       return ac_build_intrinsic(ctx, "llvm.AMDGPU.clamp.", ctx->f32, args, 
> 3,
> -                                 AC_FUNC_ATTR_READNONE |
> -                                 AC_FUNC_ATTR_LEGACY);
> +       return ac_build_fmin(ctx, ac_build_fmax(ctx, value, ctx->f32_0),
> +                            ctx->f32_1);
>  }
>
>  void ac_build_export(struct ac_llvm_context *ctx, struct ac_export_args *a)
>  {
>         LLVMValueRef args[9];
>
> -       if (HAVE_LLVM >= 0x0500) {
> -               args[0] = LLVMConstInt(ctx->i32, a->target, 0);
> -               args[1] = LLVMConstInt(ctx->i32, a->enabled_channels, 0);
> +       args[0] = LLVMConstInt(ctx->i32, a->target, 0);
> +       args[1] = LLVMConstInt(ctx->i32, a->enabled_channels, 0);
>
> -               if (a->compr) {
> -                       LLVMTypeRef i16 = 
> LLVMInt16TypeInContext(ctx->context);
> -                       LLVMTypeRef v2i16 = LLVMVectorType(i16, 2);
> +       if (a->compr) {
> +               LLVMTypeRef i16 = LLVMInt16TypeInContext(ctx->context);
> +               LLVMTypeRef v2i16 = LLVMVectorType(i16, 2);
>
> -                       args[2] = LLVMBuildBitCast(ctx->builder, a->out[0],
> -                                                  v2i16, "");
> -                       args[3] = LLVMBuildBitCast(ctx->builder, a->out[1],
> -                                                  v2i16, "");
> -                       args[4] = LLVMConstInt(ctx->i1, a->done, 0);
> -                       args[5] = LLVMConstInt(ctx->i1, a->valid_mask, 0);
> -
> -                       ac_build_intrinsic(ctx, "llvm.amdgcn.exp.compr.v2i16",
> -                                          ctx->voidt, args, 6, 0);
> -               } else {
> -                       args[2] = a->out[0];
> -                       args[3] = a->out[1];
> -                       args[4] = a->out[2];
> -                       args[5] = a->out[3];
> -                       args[6] = LLVMConstInt(ctx->i1, a->done, 0);
> -                       args[7] = LLVMConstInt(ctx->i1, a->valid_mask, 0);
> -
> -                       ac_build_intrinsic(ctx, "llvm.amdgcn.exp.f32",
> -                                          ctx->voidt, args, 8, 0);
> -               }
> -               return;
> -       }
> +               args[2] = LLVMBuildBitCast(ctx->builder, a->out[0],
> +                               v2i16, "");
> +               args[3] = LLVMBuildBitCast(ctx->builder, a->out[1],
> +                               v2i16, "");
> +               args[4] = LLVMConstInt(ctx->i1, a->done, 0);
> +               args[5] = LLVMConstInt(ctx->i1, a->valid_mask, 0);
>
> -       args[0] = LLVMConstInt(ctx->i32, a->enabled_channels, 0);
> -       args[1] = LLVMConstInt(ctx->i32, a->valid_mask, 0);
> -       args[2] = LLVMConstInt(ctx->i32, a->done, 0);
> -       args[3] = LLVMConstInt(ctx->i32, a->target, 0);
> -       args[4] = LLVMConstInt(ctx->i32, a->compr, 0);
> -       memcpy(args + 5, a->out, sizeof(a->out[0]) * 4);
> +               ac_build_intrinsic(ctx, "llvm.amdgcn.exp.compr.v2i16",
> +                                  ctx->voidt, args, 6, 0);
> +       } else {
> +               args[2] = a->out[0];
> +               args[3] = a->out[1];
> +               args[4] = a->out[2];
> +               args[5] = a->out[3];
> +               args[6] = LLVMConstInt(ctx->i1, a->done, 0);
> +               args[7] = LLVMConstInt(ctx->i1, a->valid_mask, 0);
>
> -       ac_build_intrinsic(ctx, "llvm.SI.export", ctx->voidt, args, 9,
> -                          AC_FUNC_ATTR_LEGACY);
> +               ac_build_intrinsic(ctx, "llvm.amdgcn.exp.f32",
> +                                  ctx->voidt, args, 8, 0);
> +       }
>  }
>
>  void ac_build_export_null(struct ac_llvm_context *ctx)
>  {
>         struct ac_export_args args;
>
>         args.enabled_channels = 0x0; /* enabled channels */
>         args.valid_mask = 1; /* whether the EXEC mask is valid */
>         args.done = 1; /* DONE bit */
>         args.target = V_008DFC_SQ_EXP_NULL;
> @@ -1701,33 +1640,27 @@ LLVMValueRef ac_build_image_opcode(struct 
> ac_llvm_context *ctx,
>         if (!sample && retty == ctx->v4f32) {
>                 result = LLVMBuildBitCast(ctx->builder, result,
>                                           ctx->v4i32, "");
>         }
>         return result;
>  }
>
>  LLVMValueRef ac_build_cvt_pkrtz_f16(struct ac_llvm_context *ctx,
>                                     LLVMValueRef args[2])
>  {
> -       if (HAVE_LLVM >= 0x0500) {
> -               LLVMTypeRef v2f16 =
> -                       LLVMVectorType(LLVMHalfTypeInContext(ctx->context), 
> 2);
> -               LLVMValueRef res =
> -                       ac_build_intrinsic(ctx, "llvm.amdgcn.cvt.pkrtz",
> -                                          v2f16, args, 2,
> -                                          AC_FUNC_ATTR_READNONE);
> -               return LLVMBuildBitCast(ctx->builder, res, ctx->i32, "");
> -       }
> -
> -       return ac_build_intrinsic(ctx, "llvm.SI.packf16", ctx->i32, args, 2,
> -                                 AC_FUNC_ATTR_READNONE |
> -                                 AC_FUNC_ATTR_LEGACY);
> +       LLVMTypeRef v2f16 =
> +               LLVMVectorType(LLVMHalfTypeInContext(ctx->context), 2);
> +       LLVMValueRef res =
> +               ac_build_intrinsic(ctx, "llvm.amdgcn.cvt.pkrtz",
> +                                  v2f16, args, 2,
> +                                  AC_FUNC_ATTR_READNONE);
> +       return LLVMBuildBitCast(ctx->builder, res, ctx->i32, "");
>  }
>
>  /* Upper 16 bits must be zero. */
>  static LLVMValueRef ac_llvm_pack_two_int16(struct ac_llvm_context *ctx,
>                                            LLVMValueRef val[2])
>  {
>         return LLVMBuildOr(ctx->builder, val[0],
>                            LLVMBuildShl(ctx->builder, val[1],
>                                         LLVMConstInt(ctx->i32, 16, 0),
>                                         ""), "");
> @@ -1897,34 +1830,25 @@ void ac_build_kill_if_false(struct ac_llvm_context 
> *ctx, LLVMValueRef i1)
>  LLVMValueRef ac_build_bfe(struct ac_llvm_context *ctx, LLVMValueRef input,
>                           LLVMValueRef offset, LLVMValueRef width,
>                           bool is_signed)
>  {
>         LLVMValueRef args[] = {
>                 input,
>                 offset,
>                 width,
>         };
>
> -       if (HAVE_LLVM >= 0x0500) {
> -               return ac_build_intrinsic(ctx,
> -                                         is_signed ? "llvm.amdgcn.sbfe.i32" :
> -                                                     "llvm.amdgcn.ubfe.i32",
> -                                         ctx->i32, args, 3,
> -                                         AC_FUNC_ATTR_READNONE);
> -       }
> -
>         return ac_build_intrinsic(ctx,
> -                                 is_signed ? "llvm.AMDGPU.bfe.i32" :
> -                                             "llvm.AMDGPU.bfe.u32",
> +                                 is_signed ? "llvm.amdgcn.sbfe.i32" :
> +                                             "llvm.amdgcn.ubfe.i32",
>                                   ctx->i32, args, 3,
> -                                 AC_FUNC_ATTR_READNONE |
> -                                 AC_FUNC_ATTR_LEGACY);
> +                                 AC_FUNC_ATTR_READNONE);
>  }
>
>  void ac_build_waitcnt(struct ac_llvm_context *ctx, unsigned simm16)
>  {
>         LLVMValueRef args[1] = {
>                 LLVMConstInt(ctx->i32, simm16, false),
>         };
>         ac_build_intrinsic(ctx, "llvm.amdgcn.s.waitcnt",
>                            ctx->voidt, args, 1, 0);
>  }
> @@ -1990,23 +1914,23 @@ LLVMValueRef ac_build_fsign(struct ac_llvm_context 
> *ctx, LLVMValueRef src0,
>                 one = ctx->f64_1;
>         }
>
>         cmp = LLVMBuildFCmp(ctx->builder, LLVMRealOGT, src0, zero, "");
>         val = LLVMBuildSelect(ctx->builder, cmp, one, src0, "");
>         cmp = LLVMBuildFCmp(ctx->builder, LLVMRealOGE, val, zero, "");
>         val = LLVMBuildSelect(ctx->builder, cmp, val, LLVMConstReal(type, 
> -1.0), "");
>         return val;
>  }
>
> -#define AC_EXP_TARGET (HAVE_LLVM >= 0x0500 ? 0 : 3)
> -#define AC_EXP_ENABLED_CHANNELS (HAVE_LLVM >= 0x0500 ? 1 : 0)
> -#define AC_EXP_OUT0 (HAVE_LLVM >= 0x0500 ? 2 : 5)
> +#define AC_EXP_TARGET          0
> +#define AC_EXP_ENABLED_CHANNELS 1
> +#define AC_EXP_OUT0            2
>
>  enum ac_ir_type {
>         AC_IR_UNDEF,
>         AC_IR_CONST,
>         AC_IR_VALUE,
>  };
>
>  struct ac_vs_exp_chan
>  {
>         LLVMValueRef value;
> diff --git a/src/amd/common/ac_llvm_helper.cpp 
> b/src/amd/common/ac_llvm_helper.cpp
> index 1d2369baa73..1a2aee3bc9a 100644
> --- a/src/amd/common/ac_llvm_helper.cpp
> +++ b/src/amd/common/ac_llvm_helper.cpp
> @@ -30,36 +30,24 @@
>  #undef DEBUG
>
>  #include "ac_llvm_util.h"
>  #include <llvm-c/Core.h>
>  #include <llvm/Target/TargetOptions.h>
>  #include <llvm/ExecutionEngine/ExecutionEngine.h>
>  #include <llvm/IR/Attributes.h>
>  #include <llvm/IR/CallSite.h>
>  #include <llvm/IR/IRBuilder.h>
>
> -#if HAVE_LLVM < 0x0500
> -namespace llvm {
> -typedef AttributeSet AttributeList;
> -}
> -#endif
> -
>  void ac_add_attr_dereferenceable(LLVMValueRef val, uint64_t bytes)
>  {
>     llvm::Argument *A = llvm::unwrap<llvm::Argument>(val);
> -#if HAVE_LLVM < 0x0500
> -   llvm::AttrBuilder B;
> -   B.addDereferenceableAttr(bytes);
> -   A->addAttr(llvm::AttributeList::get(A->getContext(), A->getArgNo() + 1,  
> B));
> -#else
>     A->addAttr(llvm::Attribute::getWithDereferenceableBytes(A->getContext(), 
> bytes));
> -#endif
>  }
>
>  bool ac_is_sgpr_param(LLVMValueRef arg)
>  {
>         llvm::Argument *A = llvm::unwrap<llvm::Argument>(arg);
>         llvm::AttributeList AS = A->getParent()->getAttributes();
>         unsigned ArgNo = A->getArgNo();
>         return AS.hasAttribute(ArgNo + 1, llvm::Attribute::InReg);
>  }
>
> diff --git a/src/amd/vulkan/radv_debug.c b/src/amd/vulkan/radv_debug.c
> index 368bc4b5d05..e55489d71d1 100644
> --- a/src/amd/vulkan/radv_debug.c
> +++ b/src/amd/vulkan/radv_debug.c
> @@ -636,25 +636,23 @@ radv_dump_device_name(struct radv_device *device, FILE 
> *f)
>         char llvm_string[32] = {}, kernel_version[128] = {};
>         struct utsname uname_data;
>         const char *chip_name;
>
>         chip_name = device->ws->get_chip_name(device->ws);
>
>         if (uname(&uname_data) == 0)
>                 snprintf(kernel_version, sizeof(kernel_version),
>                          " / %s", uname_data.release);
>
> -       if (HAVE_LLVM > 0) {
> -               snprintf(llvm_string, sizeof(llvm_string),
> -                        ", LLVM %i.%i.%i", (HAVE_LLVM >> 8) & 0xff,
> -                        HAVE_LLVM & 0xff, MESA_LLVM_VERSION_PATCH);
> -       }
> +       snprintf(llvm_string, sizeof(llvm_string),
> +                ", LLVM %i.%i.%i", (HAVE_LLVM >> 8) & 0xff,
> +                HAVE_LLVM & 0xff, MESA_LLVM_VERSION_PATCH);
>
>         fprintf(f, "Device name: %s (%s DRM %i.%i.%i%s%s)\n\n",
>                 chip_name, device->physical_device->name,
>                 info->drm_major, info->drm_minor, info->drm_patchlevel,
>                 kernel_version, llvm_string);
>  }
>
>  static bool
>  radv_gpu_hang_occured(struct radv_queue *queue, enum ring_type ring)
>  {
> diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c
> index a7f4a5ab7b8..8fe14dbc3b1 100644
> --- a/src/amd/vulkan/radv_device.c
> +++ b/src/amd/vulkan/radv_device.c
> @@ -101,26 +101,23 @@ radv_get_device_name(enum radeon_family family, char 
> *name, size_t name_len)
>         case CHIP_POLARIS11: chip_string = "AMD RADV POLARIS11"; break;
>         case CHIP_POLARIS12: chip_string = "AMD RADV POLARIS12"; break;
>         case CHIP_STONEY: chip_string = "AMD RADV STONEY"; break;
>         case CHIP_VEGAM: chip_string = "AMD RADV VEGA M"; break;
>         case CHIP_VEGA10: chip_string = "AMD RADV VEGA10"; break;
>         case CHIP_VEGA12: chip_string = "AMD RADV VEGA12"; break;
>         case CHIP_RAVEN: chip_string = "AMD RADV RAVEN"; break;
>         default: chip_string = "AMD RADV unknown"; break;
>         }
>
> -       if (HAVE_LLVM > 0) {
> -               snprintf(llvm_string, sizeof(llvm_string),
> -                        " (LLVM %i.%i.%i)", (HAVE_LLVM >> 8) & 0xff,
> -                        HAVE_LLVM & 0xff, MESA_LLVM_VERSION_PATCH);
> -       }
> -
> +       snprintf(llvm_string, sizeof(llvm_string),
> +                " (LLVM %i.%i.%i)", (HAVE_LLVM >> 8) & 0xff,
> +                HAVE_LLVM & 0xff, MESA_LLVM_VERSION_PATCH);
>         snprintf(name, name_len, "%s%s", chip_string, llvm_string);
>  }
>
>  static void
>  radv_physical_device_init_mem_types(struct radv_physical_device *device)
>  {
>         STATIC_ASSERT(RADV_MEM_HEAP_COUNT <= VK_MAX_MEMORY_HEAPS);
>         uint64_t visible_vram_size = MIN2(device->rad_info.vram_size,
>                                           device->rad_info.vram_vis_size);
>
> diff --git a/src/amd/vulkan/radv_nir_to_llvm.c 
> b/src/amd/vulkan/radv_nir_to_llvm.c
> index b4af0f29415..1c3d7189a62 100644
> --- a/src/amd/vulkan/radv_nir_to_llvm.c
> +++ b/src/amd/vulkan/radv_nir_to_llvm.c
> @@ -844,21 +844,21 @@ static void set_llvm_calling_convention(LLVMValueRef 
> func,
>
>         switch (stage) {
>         case MESA_SHADER_VERTEX:
>         case MESA_SHADER_TESS_EVAL:
>                 calling_conv = RADEON_LLVM_AMDGPU_VS;
>                 break;
>         case MESA_SHADER_GEOMETRY:
>                 calling_conv = RADEON_LLVM_AMDGPU_GS;
>                 break;
>         case MESA_SHADER_TESS_CTRL:
> -               calling_conv = HAVE_LLVM >= 0x0500 ? RADEON_LLVM_AMDGPU_HS : 
> RADEON_LLVM_AMDGPU_VS;
> +               calling_conv = RADEON_LLVM_AMDGPU_HS;
>                 break;
>         case MESA_SHADER_FRAGMENT:
>                 calling_conv = RADEON_LLVM_AMDGPU_PS;
>                 break;
>         case MESA_SHADER_COMPUTE:
>                 calling_conv = RADEON_LLVM_AMDGPU_CS;
>                 break;
>         default:
>                 unreachable("Unhandle shader type");
>         }
> diff --git a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_winsys.c 
> b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_winsys.c
> index 42e83f14829..9706c04e8cd 100644
> --- a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_winsys.c
> +++ b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_winsys.c
> @@ -38,27 +38,20 @@
>  #include "radv_amdgpu_cs.h"
>  #include "radv_amdgpu_bo.h"
>  #include "radv_amdgpu_surface.h"
>
>  static bool
>  do_winsys_init(struct radv_amdgpu_winsys *ws, int fd)
>  {
>         if (!ac_query_gpu_info(fd, ws->dev, &ws->info, &ws->amdinfo))
>                 return false;
>
> -       /* LLVM 5.0 is required for GFX9. */
> -       if (ws->info.chip_class >= GFX9 && HAVE_LLVM < 0x0500) {
> -               fprintf(stderr, "amdgpu: LLVM 5.0 is required, got LLVM 
> %i.%i\n",
> -                       HAVE_LLVM >> 8, HAVE_LLVM & 255);
> -               return false;
> -       }
> -
>         ws->addrlib = amdgpu_addr_create(&ws->info, &ws->amdinfo, 
> &ws->info.max_alignment);
>         if (!ws->addrlib) {
>                 fprintf(stderr, "amdgpu: Cannot create addrlib.\n");
>                 return false;
>         }
>
>         ws->info.num_sdma_rings = MIN2(ws->info.num_sdma_rings, 
> MAX_RINGS_PER_TYPE);
>         ws->info.num_compute_rings = MIN2(ws->info.num_compute_rings, 
> MAX_RINGS_PER_TYPE);
>
>         ws->use_ib_bos = ws->info.chip_class >= CIK;
> diff --git a/src/gallium/drivers/radeonsi/si_get.c 
> b/src/gallium/drivers/radeonsi/si_get.c
> index 757192f309c..5379ba9ade5 100644
> --- a/src/gallium/drivers/radeonsi/si_get.c
> +++ b/src/gallium/drivers/radeonsi/si_get.c
> @@ -176,27 +176,25 @@ static int si_get_param(struct pipe_screen *pscreen, 
> enum pipe_cap param)
>         case PIPE_CAP_QUERY_SO_OVERFLOW:
>         case PIPE_CAP_MEMOBJ:
>         case PIPE_CAP_LOAD_CONSTBUF:
>         case PIPE_CAP_INT64:
>         case PIPE_CAP_INT64_DIVMOD:
>         case PIPE_CAP_TGSI_CLOCK:
>         case PIPE_CAP_CAN_BIND_CONST_BUFFER_AS_VERTEX:
>         case PIPE_CAP_ALLOW_MAPPED_BUFFERS_DURING_EXECUTION:
>         case PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS:
>         case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
> +       case PIPE_CAP_TGSI_BALLOT:
>         case PIPE_CAP_TGSI_VOTE:
>         case PIPE_CAP_TGSI_FS_FBFETCH:
>                 return 1;
>
> -       case PIPE_CAP_TGSI_BALLOT:
> -               return HAVE_LLVM >= 0x0500;
> -
>         case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
>                 return !SI_BIG_ENDIAN && sscreen->info.has_userptr;
>
>         case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
>                 return sscreen->info.has_gpu_reset_status_query ||
>                        sscreen->info.has_gpu_reset_counter_query;
>
>         case PIPE_CAP_TEXTURE_MULTISAMPLE:
>                 return sscreen->info.has_2d_tiling;
>
> diff --git a/src/gallium/drivers/radeonsi/si_pipe.c 
> b/src/gallium/drivers/radeonsi/si_pipe.c
> index fe0a20ba6cd..cc871b1cc9f 100644
> --- a/src/gallium/drivers/radeonsi/si_pipe.c
> +++ b/src/gallium/drivers/radeonsi/si_pipe.c
> @@ -157,21 +157,21 @@ static void si_init_compiler(struct si_screen *sscreen,
>         compiler->data_layout = LLVMCopyStringRepOfTargetData(data_layout);
>         LLVMDisposeTargetData(data_layout);
>  }
>
>  static void si_destroy_compiler(struct si_compiler *compiler)
>  {
>         if (compiler->data_layout)
>                 LLVMDisposeMessage((char*)compiler->data_layout);
>         if (compiler->passmgr)
>                 LLVMDisposePassManager(compiler->passmgr);
> -#if HAVE_LLVM < 0x0500 || HAVE_LLVM >= 0x0700
> +#if HAVE_LLVM >= 0x0700
>         /* This crashes on LLVM 5.0 and 6.0 and Ubuntu 18.04, so leak it 
> there. */
>         if (compiler->target_library_info)
>                 
> gallivm_dispose_target_library_info(compiler->target_library_info);
>  #endif
>         if (compiler->tm)
>                 LLVMDisposeTargetMachine(compiler->tm);
>  }
>
>  /*
>   * pipe_context
> diff --git a/src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c 
> b/src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c
> index a4c2a1f27ab..43bc97006c2 100644
> --- a/src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c
> +++ b/src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c
> @@ -1174,22 +1174,21 @@ void si_llvm_create_func(struct si_shader_context 
> *ctx,
>                 else if (ctx->shader->key.as_es)
>                         real_shader_type = PIPE_SHADER_GEOMETRY;
>         }
>
>         switch (real_shader_type) {
>         case PIPE_SHADER_VERTEX:
>         case PIPE_SHADER_TESS_EVAL:
>                 call_conv = RADEON_LLVM_AMDGPU_VS;
>                 break;
>         case PIPE_SHADER_TESS_CTRL:
> -               call_conv = HAVE_LLVM >= 0x0500 ? RADEON_LLVM_AMDGPU_HS :
> -                                                 RADEON_LLVM_AMDGPU_VS;
> +               call_conv = RADEON_LLVM_AMDGPU_HS;
>                 break;
>         case PIPE_SHADER_GEOMETRY:
>                 call_conv = RADEON_LLVM_AMDGPU_GS;
>                 break;
>         case PIPE_SHADER_FRAGMENT:
>                 call_conv = RADEON_LLVM_AMDGPU_PS;
>                 break;
>         case PIPE_SHADER_COMPUTE:
>                 call_conv = RADEON_LLVM_AMDGPU_CS;
>                 break;
> diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c 
> b/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c
> index 84d8ca6fcf3..caa799195fb 100644
> --- a/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c
> +++ b/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c
> @@ -46,27 +46,20 @@ static struct util_hash_table *dev_tab = NULL;
>  static simple_mtx_t dev_tab_mutex = _SIMPLE_MTX_INITIALIZER_NP;
>
>  DEBUG_GET_ONCE_BOOL_OPTION(all_bos, "RADEON_ALL_BOS", false)
>
>  /* Helper function to do the ioctls needed for setup and init. */
>  static bool do_winsys_init(struct amdgpu_winsys *ws, int fd)
>  {
>     if (!ac_query_gpu_info(fd, ws->dev, &ws->info, &ws->amdinfo))
>        goto fail;
>
> -   /* LLVM 5.0 is required for GFX9. */
> -   if (ws->info.chip_class >= GFX9 && HAVE_LLVM < 0x0500) {
> -      fprintf(stderr, "amdgpu: LLVM 5.0 is required, got LLVM %i.%i\n",
> -              HAVE_LLVM >> 8, HAVE_LLVM & 255);
> -      goto fail;
> -   }
> -
>     ws->addrlib = amdgpu_addr_create(&ws->info, &ws->amdinfo, 
> &ws->info.max_alignment);
>     if (!ws->addrlib) {
>        fprintf(stderr, "amdgpu: Cannot create addrlib.\n");
>        goto fail;
>     }
>
>     ws->check_vm = strstr(debug_get_option("R600_DEBUG", ""), "check_vm") != 
> NULL;
>     ws->debug_all_bos = debug_get_option_all_bos();
>     ws->reserve_vmid = strstr(debug_get_option("R600_DEBUG", ""), 
> "reserve_vmid") != NULL;
>
> --
> 2.17.0
>
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> mesa-dev@lists.freedesktop.org
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