On Tue, 2018-06-05 at 11:50 -0400, Rob Clark wrote: > On Tue, Jun 5, 2018 at 10:38 AM, Philipp Zabel <[email protected]> wrote: > > The temporary input/output register 0 is reserved for position in the > > fragment shader. Hardwire it to 0 and start other input/output variables > > at 1. The intrinsic input load and output store base corresponds to the > > temporary register number. > > I didn't look at this very closely, but at RA time you can pre-color > (pre-assign) specific registers, see ra_set_node_reg().. not sure if > this would be a better approach. I do this for a few frag shader > registers, mostly because at the time I hadn't found the cmdstream > register/bitfield to configure it to something other than r0.x..
Yes, thank you. We already pre-color, but with the output of this pass. I'll have a look into whether this can be simplified by doing the pre- color first and then afterwards fixing up the load/store intrinsics. We keep around the intrinsics as we use them to configure the shader inputs/outputs later. regards Philipp _______________________________________________ mesa-dev mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/mesa-dev
