On Mon, Jun 18, 2018 at 6:08 PM, Marek Olšák <mar...@gmail.com> wrote:
> Do you need this if you set compressZ = true for stencil?
Technically not, then you don't hit the path anymore. Anyway even
though neither AMDVLK or RADV anymore if we do that, it still bugged
me that the index is wrong.
- Bas
>
> Marek
>
> On Mon, Jun 18, 2018 at 11:00 AM, Bas Nieuwenhuizen
> <b...@basnieuwenhuizen.nl> wrote:
>>
>> Tile index 3 is "16 bpp depth PRT (non-MSAA), don't support
>> uncompressed depth" while tile index 0 is "non-AA compressed depth
>> or any stencil" per the comments at the top of the file.
>>
>> On my Cape Verde this caused assertions due to the bank height of
>> tile index 3 being too low. (2 while needs to be aligned to 4).
>>
>> AMDVLK probably did not hit this because it always sets compressZ
>> by default.
>>
>> v2: Removed some garbage pastes (Ilia Mirkin)
>>
>> CC: Marek Olšák <marek.ol...@amd.com>
>> ---
>> src/amd/addrlib/r800/siaddrlib.cpp | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/src/amd/addrlib/r800/siaddrlib.cpp
>> b/src/amd/addrlib/r800/siaddrlib.cpp
>> index bc009f5aff0..79ae940b4c8 100644
>> --- a/src/amd/addrlib/r800/siaddrlib.cpp
>> +++ b/src/amd/addrlib/r800/siaddrlib.cpp
>> @@ -2105,7 +2105,7 @@ VOID SiLib::HwlSetupTileInfo(
>> }
>> else // unCompressZ
>> {
>> - index = 3;
>> + index = 0;
>> }
>> }
>> else //non PRT & non Depth & non Stencil
>> --
>> 2.17.1
>>
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>
>
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