Apparently this needs to be the same as in 3DSTATE_WM.
Signed-off-by: Kenneth Graunke <[email protected]>
---
src/mesa/drivers/dri/i965/brw_defines.h | 2 ++
src/mesa/drivers/dri/i965/gen7_sf_state.c | 3 +++
2 files changed, 5 insertions(+), 0 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_defines.h
b/src/mesa/drivers/dri/i965/brw_defines.h
index 41534b6..a093112 100644
--- a/src/mesa/drivers/dri/i965/brw_defines.h
+++ b/src/mesa/drivers/dri/i965/brw_defines.h
@@ -1210,6 +1210,8 @@ enum brw_message_target {
*/
/* GEN7/DW1: */
# define GEN7_SF_DEPTH_BUFFER_SURFACE_FORMAT_SHIFT 12
+/* GEN7/DW2: */
+# define HSW_SF_LINE_STIPPLE_ENABLE 14
#define _3DSTATE_SBE 0x781F /* GEN7+ */
/* DW1 */
diff --git a/src/mesa/drivers/dri/i965/gen7_sf_state.c
b/src/mesa/drivers/dri/i965/gen7_sf_state.c
index c8f4393..5c51abc 100644
--- a/src/mesa/drivers/dri/i965/gen7_sf_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_sf_state.c
@@ -249,6 +249,9 @@ upload_sf_state(struct brw_context *brw)
dw2 |= GEN6_SF_LINE_AA_MODE_TRUE;
dw2 |= GEN6_SF_LINE_END_CAP_WIDTH_1_0;
}
+ if (ctx->Line.StippleFlag && intel->is_haswell) {
+ dw2 |= HSW_SF_LINE_STIPPLE_ENABLE;
+ }
/* FINISHME: Last Pixel Enable? Vertex Sub Pixel Precision Select?
* FINISHME: AA Line Distance Mode?
--
1.7.7.6
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