Byte ordering is :
0: V
1: U
2: Y
3: A
v2: Split refactoring of alpha channel (Lionel)
Signed-off-by: Lionel Landwerlin <lionel.g.landwer...@intel.com>
Reviewed-by: Tapani Pälli <tapani.pa...@intel.com>
---
src/compiler/nir/nir.h | 1 +
src/compiler/nir/nir_lower_tex.c | 19 +++++++++++++++++++
2 files changed, 20 insertions(+)
diff --git a/src/compiler/nir/nir.h b/src/compiler/nir/nir.h
index f4f6b106505..2a843de8ae1 100644
--- a/src/compiler/nir/nir.h
+++ b/src/compiler/nir/nir.h
@@ -2904,6 +2904,7 @@ typedef struct nir_lower_tex_options {
unsigned lower_y_u_v_external;
unsigned lower_yx_xuxv_external;
unsigned lower_xy_uxvx_external;
+ unsigned lower_ayuv_external;
/**
* To emulate certain texture wrap modes, this can be used
diff --git a/src/compiler/nir/nir_lower_tex.c b/src/compiler/nir/nir_lower_tex.c
index c16a32f54e8..e10d4ea62f6 100644
--- a/src/compiler/nir/nir_lower_tex.c
+++ b/src/compiler/nir/nir_lower_tex.c
@@ -348,6 +348,20 @@ lower_xy_uxvx_external(nir_builder *b, nir_tex_instr *tex)
nir_imm_float(b, 1.0f));
}
+static void
+lower_ayuv_external(nir_builder *b, nir_tex_instr *tex)
+{
+ b->cursor = nir_after_instr(&tex->instr);
+
+ nir_ssa_def *ayuv = sample_plane(b, tex, 0);
+
+ convert_yuv_to_rgb(b, tex,
+ nir_channel(b, ayuv, 2),
+ nir_channel(b, ayuv, 1),
+ nir_channel(b, ayuv, 0),
+ nir_channel(b, ayuv, 3));
+}
+
/*
* Emits a textureLod operation used to replace an existing
* textureGrad instruction.
@@ -793,6 +807,11 @@ nir_lower_tex_block(nir_block *block, nir_builder *b,
progress = true;
}
+ if ((1 << tex->texture_index) & options->lower_ayuv_external) {
+ lower_ayuv_external(b, tex);
+ progress = true;
+ }
+
if (sat_mask) {
saturate_src(b, tex, sat_mask);
progress = true;
--
2.19.1
_______________________________________________
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev
