On Mon, Dec 17, 2018 at 8:18 PM Timothy Arceri <tarc...@itsqueeze.com> wrote:
> The following patch will use this with the radeonsi NIR backend > but I've added it to ac so we can use it with RADV in future. > > This is a NIR implementation of the tgsi function > tgsi_scan_tess_ctrl(). > --- > src/amd/common/ac_nir_to_llvm.c | 161 ++++++++++++++++++++++++++++++++ > src/amd/common/ac_nir_to_llvm.h | 2 + > 2 files changed, 163 insertions(+) > > diff --git a/src/amd/common/ac_nir_to_llvm.c > b/src/amd/common/ac_nir_to_llvm.c > index 4294956de1..055940b75f 100644 > --- a/src/amd/common/ac_nir_to_llvm.c > +++ b/src/amd/common/ac_nir_to_llvm.c > @@ -4063,3 +4063,164 @@ ac_lower_indirect_derefs(struct nir_shader *nir, > enum chip_class chip_class) > > nir_lower_indirect_derefs(nir, indirect_mask); > } > + > +static unsigned > +get_inst_tessfactor_writemask(nir_intrinsic_instr *intrin) > +{ > + if (intrin->intrinsic != nir_intrinsic_store_deref) > + return 0; > + > + nir_variable *var = > + > nir_deref_instr_get_variable(nir_src_as_deref(intrin->src[0])); > + > + if (var->data.mode != nir_var_shader_out) > + return 0; > + > + unsigned writemask = 0; > + const int location = var->data.location; > + unsigned first_component = var->data.location_frac; > + unsigned num_comps = intrin->dest.ssa.num_components; > + > + if (location == VARYING_SLOT_TESS_LEVEL_INNER) > + writemask = ((1 << num_comps + 1) - 1) << first_component; > Parentheses are missing in "1 << num_comps + 1". > + else if (location == VARYING_SLOT_TESS_LEVEL_OUTER) > + writemask = (((1 << num_comps + 1) - 1) << > first_component) << 4; > Same here. Marek
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