Hi Boris,
Am Fr., 22. Feb. 2019 um 10:30 Uhr schrieb Boris Brezillon
<boris.brezil...@collabora.com>:
>
> On Thu, 21 Feb 2019 23:29:53 +0100
> Boris Brezillon <boris.brezil...@collabora.com> wrote:
>
> > Christian, Marek,
> >
> > On Wed, 30 Jan 2019 05:28:14 +0100
> > Marek Vasut <ma...@denx.de> wrote:
> >
> > > From: Christian Gmeiner <christian.gmei...@gmail.com>
> > >
> > > A pipe_resource can be shared by all the pipe_context's hanging off the
> > > same pipe_screen.
> >
> > We seem to be impacted by the problem you're fixing here, but, while
> > this patch definitely make things much better, the problem does not
> > seem to be entirely fixed (at least in our case).
> >
I also got some (private) reports about problems with QtWebEngine but had no
time yet to look more deeply into the issue.
>
> --->8---
> diff --git a/src/gallium/drivers/etnaviv/etnaviv_rs.c
> b/src/gallium/drivers/etnaviv/etnaviv_rs.c
> index fc4f65dbeee1..b8c8b96a6f72 100644
> --- a/src/gallium/drivers/etnaviv/etnaviv_rs.c
> +++ b/src/gallium/drivers/etnaviv/etnaviv_rs.c
> @@ -729,6 +729,7 @@ etna_try_rs_blit(struct pipe_context *pctx,
>
> etna_submit_rs_state(ctx, ©_to_screen);
> resource_written(ctx, &dst->base);
> + resource_read(ctx, &src->base);
> dst->seqno++;
> dst->levels[blit_info->dst.level].ts_valid = false;
> ctx->dirty |= ETNA_DIRTY_DERIVE_TS;
> diff --git a/src/gallium/drivers/etnaviv/etnaviv_transfer.c
> b/src/gallium/drivers/etnaviv/etnaviv_transfer.c
> index a3013e624ead..e4b2ac605e63 100644
> --- a/src/gallium/drivers/etnaviv/etnaviv_transfer.c
> +++ b/src/gallium/drivers/etnaviv/etnaviv_transfer.c
> @@ -356,6 +356,7 @@ etna_transfer_map(struct pipe_context *pctx, struct
> pipe_resource *prsc,
> * transfers without a temporary resource.
> */
> if (trans->rsc || !(usage & PIPE_TRANSFER_UNSYNCHRONIZED)) {
> + struct etna_screen *screen = ctx->screen;
> uint32_t prep_flags = 0;
>
> /*
> @@ -364,11 +365,13 @@ etna_transfer_map(struct pipe_context *pctx, struct
> pipe_resource *prsc,
> * current GPU usage (reads must wait for GPU writes, writes must have
> * exclusive access to the buffer).
> */
> + mtx_lock(&screen->lock);
> if ((trans->rsc && (etna_resource(trans->rsc)->status &
> ETNA_PENDING_WRITE)) ||
> (!trans->rsc &&
> (((usage & PIPE_TRANSFER_READ) && (rsc->status &
> ETNA_PENDING_WRITE)) ||
> ((usage & PIPE_TRANSFER_WRITE) && rsc->status))))
> pctx->flush(pctx, NULL, 0);
> + mtx_unlock(&screen->lock);
>
> if (usage & PIPE_TRANSFER_READ)
> prep_flags |= DRM_ETNA_PREP_READ;
>
Looks good to me - will prepare a v6 of this patch with your changes
incorporated.
Thanks a lot!
--
greets
--
Christian Gmeiner, MSc
https://christian-gmeiner.info
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