This v2 addresses comments to v1, specifically constant folding of SHR/SHL
instructions now only take up to 5-bits from the shift count parameter, just
like the hardware does.
Also, patch 2 has been fixed to avoid hitting assertions that would then be
fixed by patch 3. I sent the series up to patch 2 to Jenkins and verified that
it came back green.
Iago Toral Quiroga (3):
intel/compiler: allow constant propagation for int quotient and
reminder
intel/compiler: allow constant propagation to first source of 2src
instructions
intel/compiler: implement more algebraic optimizations
src/intel/compiler/brw_fs.cpp | 203 +++++++++++++++++-
.../compiler/brw_fs_combine_constants.cpp | 39 +++-
.../compiler/brw_fs_copy_propagation.cpp | 59 +++--
3 files changed, 253 insertions(+), 48 deletions(-)
--
2.17.1
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