This reverts commit d118e382dd037696ff904e230b11028abf214e80.
This first patch in this series caused a piglit regression with
radeonsi NIR on my VEGA64.
tests/spec/arb_shader_storage_buffer_object/execution/ssbo-atomicAdd-int.shader_test
---
src/amd/common/ac_nir_to_llvm.c | 10 +++-------
1 file changed, 3 insertions(+), 7 deletions(-)
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 3890aebc982..de2a9ed8f67 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -1643,9 +1643,8 @@ static void visit_store_ssbo(struct ac_nir_context *ctx,
static LLVMValueRef visit_atomic_ssbo(struct ac_nir_context *ctx,
const nir_intrinsic_instr *instr)
{
- LLVMTypeRef return_type = LLVMTypeOf(get_src(ctx, instr->src[2]));
const char *op;
- char name[64], type[8];
+ char name[64];
LLVMValueRef params[6];
int arg_count = 0;
@@ -1698,21 +1697,18 @@ static LLVMValueRef visit_atomic_ssbo(struct
ac_nir_context *ctx,
params[arg_count++] = ctx->ac.i32_0; /* soffset */
params[arg_count++] = ctx->ac.i32_0; /* slc */
- ac_build_type_name_for_intr(return_type, type, sizeof(type));
snprintf(name, sizeof(name),
- "llvm.amdgcn.raw.buffer.atomic.%s.%s", op, type);
+ "llvm.amdgcn.raw.buffer.atomic.%s.i32", op);
} else {
params[arg_count++] = ctx->ac.i32_0; /* vindex */
params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
params[arg_count++] = ctx->ac.i1false; /* slc */
- assert(return_type == ctx->ac.i32);
snprintf(name, sizeof(name),
"llvm.amdgcn.buffer.atomic.%s", op);
}
- return ac_build_intrinsic(&ctx->ac, name, return_type, params,
- arg_count, 0);
+ return ac_build_intrinsic(&ctx->ac, name, ctx->ac.i32, params,
arg_count, 0);
}
static LLVMValueRef visit_load_buffer(struct ac_nir_context *ctx,
--
2.20.1
_______________________________________________
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev
