From: Marek Olšák <[email protected]>
---
.../drivers/radeonsi/si_shader_tgsi_mem.c | 38 ++++++++-----------
1 file changed, 16 insertions(+), 22 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c
b/src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c
index c5704bc0eae..63184a4f396 100644
--- a/src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c
+++ b/src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c
@@ -592,70 +592,64 @@ static void store_emit_buffer(struct si_shader_context
*ctx,
LLVMValueRef voffset,
unsigned cache_policy,
bool writeonly_memory)
{
LLVMBuilderRef builder = ctx->ac.builder;
LLVMValueRef base_data = value;
LLVMValueRef base_offset = voffset;
while (writemask) {
int start, count;
- const char *intrinsic_name;
LLVMValueRef data, voff;
u_bit_scan_consecutive_range(&writemask, &start, &count);
- /* Due to an LLVM limitation, split 3-element writes
- * into a 2-element and a 1-element write. */
- if (count == 3) {
- writemask |= 1 << (start + 2);
- count = 2;
- }
-
- if (count == 4) {
+ if (count == 3 && ac_has_vec3_support(ctx->ac.chip_class,
false)) {
+ LLVMValueRef values[3] = {
+ LLVMBuildExtractElement(builder, base_data,
+ LLVMConstInt(ctx->i32,
start, 0), ""),
+ LLVMBuildExtractElement(builder, base_data,
+ LLVMConstInt(ctx->i32,
start + 1, 0), ""),
+ LLVMBuildExtractElement(builder, base_data,
+ LLVMConstInt(ctx->i32,
start + 2, 0), ""),
+ };
+ data = ac_build_gather_values(&ctx->ac, values, 3);
+ } else if (count >= 3) {
data = base_data;
- intrinsic_name = "llvm.amdgcn.buffer.store.v4f32";
} else if (count == 2) {
LLVMValueRef values[2] = {
LLVMBuildExtractElement(builder, base_data,
LLVMConstInt(ctx->i32,
start, 0), ""),
LLVMBuildExtractElement(builder, base_data,
LLVMConstInt(ctx->i32,
start + 1, 0), ""),
};
data = ac_build_gather_values(&ctx->ac, values, 2);
- intrinsic_name = "llvm.amdgcn.buffer.store.v2f32";
} else {
assert(count == 1);
data = LLVMBuildExtractElement(
builder, base_data,
LLVMConstInt(ctx->i32, start, 0), "");
- intrinsic_name = "llvm.amdgcn.buffer.store.f32";
}
voff = base_offset;
if (start != 0) {
voff = LLVMBuildAdd(
builder, voff,
LLVMConstInt(ctx->i32, start * 4, 0), "");
}
- LLVMValueRef args[] = {
- data,
- resource,
- ctx->i32_0, /* vindex */
- voff,
- LLVMConstInt(ctx->i1, !!(cache_policy & ac_glc), 0),
- LLVMConstInt(ctx->i1, !!(cache_policy & ac_slc), 0),
- };
- ac_build_intrinsic(&ctx->ac, intrinsic_name, ctx->voidt, args,
6,
- ac_get_store_intr_attribs(writeonly_memory));
+ ac_build_buffer_store_dword(&ctx->ac, resource, data, count,
+ voff, ctx->i32_0, 0,
+ !!(cache_policy & ac_glc),
+ !!(cache_policy & ac_slc),
+ writeonly_memory, false);
}
}
static void store_emit_memory(
struct si_shader_context *ctx,
struct lp_build_emit_data *emit_data)
{
const struct tgsi_full_instruction *inst = emit_data->inst;
LLVMBuilderRef builder = ctx->ac.builder;
unsigned writemask = inst->Dst[0].Register.WriteMask;
--
2.17.1
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