r-b for the series
On Wed, Jun 26, 2019 at 3:07 PM Samuel Pitoiset <samuel.pitoi...@gmail.com> wrote: > > Just a cleanup, it shouldn't change anything. > > Signed-off-by: Samuel Pitoiset <samuel.pitoi...@gmail.com> > --- > src/amd/vulkan/radv_nir_to_llvm.c | 22 -------------------- > src/amd/vulkan/radv_shader.c | 34 ++++++++++++++++++++++++++++--- > src/amd/vulkan/radv_shader.h | 1 - > 3 files changed, 31 insertions(+), 26 deletions(-) > > diff --git a/src/amd/vulkan/radv_nir_to_llvm.c > b/src/amd/vulkan/radv_nir_to_llvm.c > index d6f286fe4ec..211fc4aec47 100644 > --- a/src/amd/vulkan/radv_nir_to_llvm.c > +++ b/src/amd/vulkan/radv_nir_to_llvm.c > @@ -2191,14 +2191,6 @@ handle_vs_input_decl(struct radv_shader_context *ctx, > buffer_index = > LLVMBuildUDiv(ctx->ac.builder, buffer_index, > > LLVMConstInt(ctx->ac.i32, divisor, 0), ""); > } > - > - if (ctx->options->key.vs.as_ls) { > - ctx->shader_info->vs.vgpr_comp_cnt = > - MAX2(2, > ctx->shader_info->vs.vgpr_comp_cnt); > - } else { > - ctx->shader_info->vs.vgpr_comp_cnt = > - MAX2(1, > ctx->shader_info->vs.vgpr_comp_cnt); > - } > } else { > buffer_index = ctx->ac.i32_0; > } > @@ -3044,8 +3036,6 @@ handle_vs_outputs_post(struct radv_shader_context *ctx, > LLVMValueRef values[4]; > > values[0] = ctx->vs_prim_id; > - ctx->shader_info->vs.vgpr_comp_cnt = MAX2(2, > - > ctx->shader_info->vs.vgpr_comp_cnt); > for (unsigned j = 1; j < 4; j++) > values[j] = ctx->ac.f32_0; > > @@ -3751,15 +3741,6 @@ LLVMModuleRef ac_translate_nir_to_llvm(struct > ac_llvm_compiler *ac_llvm, > ctx.tcs_vertices_per_patch = > shaders[i]->info.tess.tcs_vertices_out; > ctx.tcs_num_patches = > ctx.options->key.tes.num_patches; > } else if (shaders[i]->info.stage == MESA_SHADER_VERTEX) { > - if (shader_info->info.vs.needs_instance_id) { > - if (ctx.options->key.vs.as_ls) { > - ctx.shader_info->vs.vgpr_comp_cnt = > - MAX2(2, > ctx.shader_info->vs.vgpr_comp_cnt); > - } else { > - ctx.shader_info->vs.vgpr_comp_cnt = > - MAX2(1, > ctx.shader_info->vs.vgpr_comp_cnt); > - } > - } > ctx.abi.load_base_vertex = radv_load_base_vertex; > } else if (shaders[i]->info.stage == MESA_SHADER_FRAGMENT) { > shader_info->fs.can_discard = > shaders[i]->info.fs.uses_discard; > @@ -3994,9 +3975,6 @@ ac_fill_shader_info(struct radv_shader_variant_info > *shader_info, struct nir_sha > case MESA_SHADER_VERTEX: > shader_info->vs.as_es = options->key.vs.as_es; > shader_info->vs.as_ls = options->key.vs.as_ls; > - /* in LS mode we need at least 1, invocation id needs 2, > handled elsewhere */ > - if (options->key.vs.as_ls) > - shader_info->vs.vgpr_comp_cnt = MAX2(1, > shader_info->vs.vgpr_comp_cnt); > break; > default: > break; > diff --git a/src/amd/vulkan/radv_shader.c b/src/amd/vulkan/radv_shader.c > index 5205dc1bfc5..0ec0d67e3b6 100644 > --- a/src/amd/vulkan/radv_shader.c > +++ b/src/amd/vulkan/radv_shader.c > @@ -507,13 +507,40 @@ radv_fill_shader_variant(struct radv_device *device, > break; > case MESA_SHADER_TESS_CTRL: > if (device->physical_device->rad_info.chip_class >= GFX9) { > - vgpr_comp_cnt = variant->info.vs.vgpr_comp_cnt; > + /* We need at least 2 components for LS. > + * VGPR0-3: (VertexID, RelAutoindex, InstanceID / > StepRate0, InstanceID). > + * StepRate0 is set to 1. so that VGPR3 doesn't have > to be loaded. > + */ > + vgpr_comp_cnt = info->vs.needs_instance_id ? 2 : 1; > } else { > variant->rsrc2 |= S_00B12C_OC_LDS_EN(1); > } > break; > case MESA_SHADER_VERTEX: > - vgpr_comp_cnt = variant->info.vs.vgpr_comp_cnt; > + if (variant->info.vs.as_ls) { > + assert(device->physical_device->rad_info.chip_class > <= GFX8); > + /* We need at least 2 components for LS. > + * VGPR0-3: (VertexID, RelAutoindex, InstanceID / > StepRate0, InstanceID). > + * StepRate0 is set to 1. so that VGPR3 doesn't have > to be loaded. > + */ > + vgpr_comp_cnt = info->vs.needs_instance_id ? 2 : 1; > + } else if (variant->info.vs.as_es) { > + assert(device->physical_device->rad_info.chip_class > <= GFX8); > + /* VGPR0-3: (VertexID, InstanceID / StepRate0, ...) */ > + vgpr_comp_cnt = info->vs.needs_instance_id ? 1 : 0; > + } else { > + /* VGPR0-3: (VertexID, InstanceID / StepRate0, > PrimID, InstanceID) > + * If PrimID is disabled. InstanceID / StepRate1 is > loaded instead. > + * StepRate0 is set to 1. so that VGPR3 doesn't have > to be loaded. > + */ > + if (options->key.vs.export_prim_id) { > + vgpr_comp_cnt = 2; > + } else if (info->vs.needs_instance_id) { > + vgpr_comp_cnt = 1; > + } else { > + vgpr_comp_cnt = 0; > + } > + } > break; > case MESA_SHADER_FRAGMENT: > case MESA_SHADER_GEOMETRY: > @@ -539,7 +566,8 @@ radv_fill_shader_variant(struct radv_device *device, > unsigned gs_vgpr_comp_cnt, es_vgpr_comp_cnt; > > if (es_type == MESA_SHADER_VERTEX) { > - es_vgpr_comp_cnt = variant->info.vs.vgpr_comp_cnt; > + /* VGPR0-3: (VertexID, InstanceID / StepRate0, ...) */ > + es_vgpr_comp_cnt = info->vs.needs_instance_id ? 1 : 0; > } else if (es_type == MESA_SHADER_TESS_EVAL) { > es_vgpr_comp_cnt = info->uses_prim_id ? 3 : 2; > } else { > diff --git a/src/amd/vulkan/radv_shader.h b/src/amd/vulkan/radv_shader.h > index bfd2787a123..baf87c2d64f 100644 > --- a/src/amd/vulkan/radv_shader.h > +++ b/src/amd/vulkan/radv_shader.h > @@ -264,7 +264,6 @@ struct radv_shader_variant_info { > struct { > struct radv_vs_output_info outinfo; > struct radv_es_output_info es_info; > - unsigned vgpr_comp_cnt; > bool as_es; > bool as_ls; > } vs; > -- > 2.22.0 > > _______________________________________________ > mesa-dev mailing list > mesa-dev@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/mesa-dev _______________________________________________ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev