On Thu, Nov 29, 2012 at 11:48:39PM +0100, Vincent Lejeune wrote:
> ---
>  src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c | 12 ++++--------
>  1 file changed, 4 insertions(+), 8 deletions(-)
>

Reviewed-by: Tom Stellard <thomas.stell...@amd.com>
 
> diff --git a/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c 
> b/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c
> index 5e3d6c2..00c068d 100644
> --- a/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c
> +++ b/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c
> @@ -547,12 +547,12 @@ static void emit_prepare_cube_coords(
>       mad_args[2] = LLVMConstReal(type, 1.5);
>  
>       mad_args[0] = coords[0];
> -     coords[0] = build_intrinsic(builder, "llvm.AMDIL.mad.",
> -                     type, mad_args, 3, LLVMReadNoneAttribute);
> +     coords[0] = lp_build_emit_llvm_ternary(bld_base, TGSI_OPCODE_MAD,
> +                     mad_args[0], mad_args[1], mad_args[2]);
>  
>       mad_args[0] = coords[1];
> -     coords[1] = build_intrinsic(builder, "llvm.AMDIL.mad.",
> -                     type, mad_args, 3, LLVMReadNoneAttribute);
> +     coords[1] = lp_build_emit_llvm_ternary(bld_base, TGSI_OPCODE_MAD,
> +                     mad_args[0], mad_args[1], mad_args[2]);
>  
>       /* apply yxwy swizzle to cooords */
>       coords[2] = coords[3];
> @@ -1123,15 +1123,11 @@ void radeon_llvm_context_init(struct 
> radeon_llvm_context * ctx)
>       bld_base->op_actions[TGSI_OPCODE_LG2].intr_name = "llvm.log2.f32";
>       bld_base->op_actions[TGSI_OPCODE_LRP].emit = build_tgsi_intrinsic_nomem;
>       bld_base->op_actions[TGSI_OPCODE_LRP].intr_name = "llvm.AMDGPU.lrp";
> -     bld_base->op_actions[TGSI_OPCODE_MAD].emit = build_tgsi_intrinsic_nomem;
> -     bld_base->op_actions[TGSI_OPCODE_MAD].intr_name = "llvm.AMDIL.mad.";
>       bld_base->op_actions[TGSI_OPCODE_MAX].emit = build_tgsi_intrinsic_nomem;
>       bld_base->op_actions[TGSI_OPCODE_MAX].intr_name = "llvm.AMDIL.max.";
>       bld_base->op_actions[TGSI_OPCODE_MOD].emit = emit_mod;
>       bld_base->op_actions[TGSI_OPCODE_MIN].emit = build_tgsi_intrinsic_nomem;
>       bld_base->op_actions[TGSI_OPCODE_MIN].intr_name = "llvm.AMDIL.min.";
> -     bld_base->op_actions[TGSI_OPCODE_MUL].emit = build_tgsi_intrinsic_nomem;
> -     bld_base->op_actions[TGSI_OPCODE_MUL].intr_name = "llvm.AMDGPU.mul";
>       bld_base->op_actions[TGSI_OPCODE_NOT].emit = emit_not;
>       bld_base->op_actions[TGSI_OPCODE_OR].emit = emit_or;
>       bld_base->op_actions[TGSI_OPCODE_POW].emit = 
> build_tgsi_intrinsic_readonly;
> -- 
> 1.8.0
> 
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