On Thu, Nov 29, 2012 at 11:51:33PM +0100, Vincent Lejeune wrote:
> ---
> src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c | 4 ----
> 1 file changed, 4 deletions(-)
>
I think it would be good to replace the MIN/MAX patterns in
{R600,SI}Instructions.td to match LLVM IR rather than the
old intrinsics and also to update the test cases in test/CodeGen/R600
Reviewed-by: Tom Stellard <thomas.stell...@amd.com>
> diff --git a/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c
> b/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c
> index 2521582..9cb0e9a 100644
> --- a/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c
> +++ b/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c
> @@ -1120,11 +1120,7 @@ void radeon_llvm_context_init(struct
> radeon_llvm_context * ctx)
> bld_base->op_actions[TGSI_OPCODE_LG2].intr_name = "llvm.log2.f32";
> bld_base->op_actions[TGSI_OPCODE_LRP].emit = build_tgsi_intrinsic_nomem;
> bld_base->op_actions[TGSI_OPCODE_LRP].intr_name = "llvm.AMDGPU.lrp";
> - bld_base->op_actions[TGSI_OPCODE_MAX].emit = build_tgsi_intrinsic_nomem;
> - bld_base->op_actions[TGSI_OPCODE_MAX].intr_name = "llvm.AMDIL.max.";
> bld_base->op_actions[TGSI_OPCODE_MOD].emit = emit_mod;
> - bld_base->op_actions[TGSI_OPCODE_MIN].emit = build_tgsi_intrinsic_nomem;
> - bld_base->op_actions[TGSI_OPCODE_MIN].intr_name = "llvm.AMDIL.min.";
> bld_base->op_actions[TGSI_OPCODE_NOT].emit = emit_not;
> bld_base->op_actions[TGSI_OPCODE_OR].emit = emit_or;
> bld_base->op_actions[TGSI_OPCODE_POW].emit =
> build_tgsi_intrinsic_readonly;
> --
> 1.8.0
>
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