From: Alex Deucher <alexander.deuc...@amd.com>
With the previous flushing changes this seems to work
reliably now.
v2: add R600_CONTEXT_FLUSH_AND_INV
Signed-off-by: Alex Deucher <alexander.deuc...@amd.com>
---
src/gallium/drivers/r600/r600_blit.c | 3 +--
src/gallium/drivers/r600/r600_hw_context.c | 9 ++-------
2 files changed, 3 insertions(+), 9 deletions(-)
diff --git a/src/gallium/drivers/r600/r600_blit.c
b/src/gallium/drivers/r600/r600_blit.c
index 046eab5..019b456 100644
--- a/src/gallium/drivers/r600/r600_blit.c
+++ b/src/gallium/drivers/r600/r600_blit.c
@@ -508,8 +508,7 @@ void r600_copy_buffer(struct pipe_context *ctx, struct
pipe_resource *dst, unsig
{
struct r600_context *rctx = (struct r600_context*)ctx;
- /* CP DMA doesn't work on R600 (flushing seems to be unreliable). */
- if (rctx->screen->info.drm_minor >= 27 && rctx->chip_class >= R700) {
+ if (rctx->screen->info.drm_minor >= 27) {
r600_cp_dma_copy_buffer(rctx, dst, dstx, src, src_box->x,
src_box->width);
}
else if (rctx->screen->has_streamout &&
diff --git a/src/gallium/drivers/r600/r600_hw_context.c
b/src/gallium/drivers/r600/r600_hw_context.c
index 735fdf2..1736414 100644
--- a/src/gallium/drivers/r600/r600_hw_context.c
+++ b/src/gallium/drivers/r600/r600_hw_context.c
@@ -1115,12 +1115,6 @@ void r600_cp_dma_copy_buffer(struct r600_context *rctx,
struct radeon_winsys_cs *cs = rctx->rings.gfx.cs;
assert(size);
- assert(rctx->chip_class != R600);
-
- /* CP DMA doesn't work on R600 (flushing seems to be unreliable). */
- if (rctx->chip_class == R600) {
- return;
- }
dst_offset += r600_resource_va(&rctx->screen->screen, dst);
src_offset += r600_resource_va(&rctx->screen->screen, src);
@@ -1174,7 +1168,8 @@ void r600_cp_dma_copy_buffer(struct r600_context *rctx,
}
/* Invalidate the read caches. */
- rctx->flags |= R600_CONTEXT_INVAL_READ_CACHES;
+ rctx->flags |= R600_CONTEXT_INVAL_READ_CACHES |
+ R600_CONTEXT_FLUSH_AND_INV;
}
void r600_need_dma_space(struct r600_context *ctx, unsigned num_dw)
--
1.7.7.5
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