On Tue, Mar 12, 2013 at 7:57 AM, Michel Dänzer <mic...@daenzer.net> wrote: > From: Michel Dänzer <michel.daen...@amd.com> > > In cases where the vertex element size is smaller than the vertex buffer > stride, the previous calculation could end up 1 too low. This would result > in the GPU using index 0 instead of the maximum index for those elements, > which would be visible as intermittent distorted triangles. > > NOTE: This is a candidate for the 9.1 branch. > > Signed-off-by: Michel Dänzer <michel.daen...@amd.com>
Reviewed-by: Alex Deucher <alexander.deuc...@amd.com> > --- > src/gallium/drivers/radeonsi/si_state_draw.c | 10 ++++++++-- > 1 file changed, 8 insertions(+), 2 deletions(-) > > diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c > b/src/gallium/drivers/radeonsi/si_state_draw.c > index f8460b0..1049d2b 100644 > --- a/src/gallium/drivers/radeonsi/si_state_draw.c > +++ b/src/gallium/drivers/radeonsi/si_state_draw.c > @@ -448,8 +448,14 @@ static void si_vertex_buffer_update(struct r600_context > *rctx) > si_pm4_sh_data_add(pm4, va & 0xFFFFFFFF); > si_pm4_sh_data_add(pm4, (S_008F04_BASE_ADDRESS_HI(va >> 32) | > S_008F04_STRIDE(vb->stride))); > - si_pm4_sh_data_add(pm4, (vb->buffer->width0 - > vb->buffer_offset) / > - MAX2(vb->stride, 1)); > + if (vb->stride) > + /* Round up by rounding down and adding 1 */ > + si_pm4_sh_data_add(pm4, > + (vb->buffer->width0 - offset - > + > util_format_get_blocksize(ve->src_format)) / > + vb->stride + 1); > + else > + si_pm4_sh_data_add(pm4, vb->buffer->width0 - offset); > si_pm4_sh_data_add(pm4, rctx->vertex_elements->rsrc_word3[i]); > > if (!bound[ve->vertex_buffer_index]) { > -- > 1.8.2.rc3 > > _______________________________________________ > mesa-dev mailing list > mesa-dev@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/mesa-dev _______________________________________________ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev