From: Jerome Glisse <jgli...@redhat.com>

Most test pass, issue are with border color and swizzle.

Based on ircnick<maelcum> patch.

Signed-off-by: Jerome Glisse <jgli...@redhat.com>
---
 src/gallium/drivers/radeonsi/si_state.c | 165 +++++++++++++++++---------------
 src/gallium/drivers/radeonsi/sid.h      |   7 ++
 2 files changed, 96 insertions(+), 76 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_state.c 
b/src/gallium/drivers/radeonsi/si_state.c
index ca9e8b4..d968b95 100644
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -30,6 +30,7 @@
 #include "util/u_helpers.h"
 #include "util/u_math.h"
 #include "util/u_pack_color.h"
+#include "util/u_format_s3tc.h"
 #include "tgsi/tgsi_parse.h"
 #include "radeonsi_pipe.h"
 #include "radeonsi_shader.h"
@@ -1164,6 +1165,8 @@ static uint32_t si_translate_texformat(struct pipe_screen 
*screen,
                                       const struct util_format_description 
*desc,
                                       int first_non_void)
 {
+       struct r600_screen *rscreen = (struct r600_screen*)screen;
+       bool enable_s3tc = rscreen->info.drm_minor >= 31;
        boolean uniform = TRUE;
        int i;
 
@@ -1206,6 +1209,51 @@ static uint32_t si_translate_texformat(struct 
pipe_screen *screen,
        }
 
        /* TODO compressed formats */
+       if (desc->layout == UTIL_FORMAT_LAYOUT_RGTC) {
+               if (!enable_s3tc)
+                       goto out_unknown;
+
+               switch (format) {
+               case PIPE_FORMAT_RGTC1_SNORM:
+               case PIPE_FORMAT_LATC1_SNORM:
+               case PIPE_FORMAT_RGTC1_UNORM:
+               case PIPE_FORMAT_LATC1_UNORM:
+                       return V_008F14_IMG_DATA_FORMAT_BC4;
+               case PIPE_FORMAT_RGTC2_SNORM:
+               case PIPE_FORMAT_LATC2_SNORM:
+               case PIPE_FORMAT_RGTC2_UNORM:
+               case PIPE_FORMAT_LATC2_UNORM:
+                       return V_008F14_IMG_DATA_FORMAT_BC5;
+               default:
+                       goto out_unknown;
+               }
+       }
+
+       if (desc->layout == UTIL_FORMAT_LAYOUT_S3TC) {
+
+               if (!enable_s3tc)
+                       goto out_unknown;
+
+               if (!util_format_s3tc_enabled) {
+                       goto out_unknown;
+               }
+
+               switch (format) {
+               case PIPE_FORMAT_DXT1_RGB:
+               case PIPE_FORMAT_DXT1_RGBA:
+               case PIPE_FORMAT_DXT1_SRGB:
+               case PIPE_FORMAT_DXT1_SRGBA:
+                       return V_008F14_IMG_DATA_FORMAT_BC1;
+               case PIPE_FORMAT_DXT3_RGBA:
+               case PIPE_FORMAT_DXT3_SRGBA:
+                       return V_008F14_IMG_DATA_FORMAT_BC2;
+               case PIPE_FORMAT_DXT5_RGBA:
+               case PIPE_FORMAT_DXT5_SRGBA:
+                       return V_008F14_IMG_DATA_FORMAT_BC3;
+               default:
+                       goto out_unknown;
+               }
+       }
 
        if (format == PIPE_FORMAT_R9G9B9E5_FLOAT) {
                return V_008F14_IMG_DATA_FORMAT_5_9_9_9;
@@ -1541,67 +1589,16 @@ boolean si_is_format_supported(struct pipe_screen 
*screen,
        return retval == usage;
 }
 
-static unsigned si_tile_mode_index(struct r600_resource_texture *rtex, 
unsigned level)
-{
-       if (util_format_is_depth_or_stencil(rtex->real_format)) {
-               if (rtex->surface.level[level].mode == RADEON_SURF_MODE_1D) {
-                       return 4;
-               } else if (rtex->surface.level[level].mode == 
RADEON_SURF_MODE_2D) {
-                       switch (rtex->real_format) {
-                       case PIPE_FORMAT_Z16_UNORM:
-                               return 5;
-                       case PIPE_FORMAT_S8_UINT_Z24_UNORM:
-                       case PIPE_FORMAT_X8Z24_UNORM:
-                       case PIPE_FORMAT_Z24X8_UNORM:
-                       case PIPE_FORMAT_Z24_UNORM_S8_UINT:
-                       case PIPE_FORMAT_Z32_FLOAT:
-                       case PIPE_FORMAT_Z32_FLOAT_S8X24_UINT:
-                               return 6;
-                       default:
-                               return 7;
-                       }
-               }
-       }
+static unsigned si_tile_mode_index(struct r600_resource_texture *rtex, 
unsigned level, bool stencil)
+{
+       unsigned tile_mode_index = 0;
 
-       switch (rtex->surface.level[level].mode) {
-       default:
-               assert(!"Invalid surface mode");
-               /* Fall through */
-       case RADEON_SURF_MODE_LINEAR_ALIGNED:
-               return 8;
-       case RADEON_SURF_MODE_1D:
-               if (rtex->surface.flags & RADEON_SURF_SCANOUT)
-                       return 9;
-               else
-                       return 13;
-       case RADEON_SURF_MODE_2D:
-               if (rtex->surface.flags & RADEON_SURF_SCANOUT) {
-                       switch (util_format_get_blocksize(rtex->real_format)) {
-                       case 1:
-                               return 10;
-                       case 2:
-                               return 11;
-                       default:
-                               assert(!"Invalid block size");
-                               /* Fall through */
-                       case 4:
-                               return 12;
-                       }
-               } else {
-                       switch (util_format_get_blocksize(rtex->real_format)) {
-                       case 1:
-                               return 14;
-                       case 2:
-                               return 15;
-                       case 4:
-                               return 16;
-                       case 8:
-                               return 17;
-                       default:
-                               return 13;
-                       }
-               }
+       if (stencil) {
+               tile_mode_index = rtex->surface.stencil_tiling_index[level];
+       } else {
+               tile_mode_index = rtex->surface.tiling_index[level];
        }
+       return tile_mode_index;
 }
 
 /*
@@ -1638,7 +1635,7 @@ static void si_cb(struct r600_context *rctx, struct 
si_pm4_state *pm4,
                slice = slice - 1;
        }
 
-       tile_mode_index = si_tile_mode_index(rtex, level);
+       tile_mode_index = si_tile_mode_index(rtex, level, false);
 
        desc = util_format_description(surf->base.format);
        for (i = 0; i < 4; i++) {
@@ -1780,15 +1777,9 @@ static void si_db(struct r600_context *rctx, struct 
si_pm4_state *pm4,
        else
                s_info = S_028044_FORMAT(V_028044_STENCIL_INVALID);
 
-       tile_mode_index = si_tile_mode_index(rtex, level);
-       if (tile_mode_index < 4 || tile_mode_index > 7) {
-               R600_ERR("Invalid DB tiling mode %d!\n",
-                                rtex->surface.level[level].mode);
-               si_pm4_set_reg(pm4, R_028040_DB_Z_INFO, 
S_028040_FORMAT(V_028040_Z_INVALID));
-               si_pm4_set_reg(pm4, R_028044_DB_STENCIL_INFO, 
S_028044_FORMAT(V_028044_STENCIL_INVALID));
-               return;
-       }
+       tile_mode_index = si_tile_mode_index(rtex, level, false);
        z_info |= S_028040_TILE_MODE_INDEX(tile_mode_index);
+       tile_mode_index = si_tile_mode_index(rtex, level, true);
        s_info |= S_028044_TILE_MODE_INDEX(tile_mode_index);
 
        si_pm4_set_reg(pm4, R_028008_DB_DEPTH_VIEW,
@@ -2166,7 +2157,27 @@ static struct pipe_sampler_view 
*si_create_sampler_view(struct pipe_context *ctx
                break;
        default:
                if (first_non_void < 0) {
-                       num_format = V_008F14_IMG_NUM_FORMAT_FLOAT;
+                       if (util_format_is_compressed(pipe_format)) {
+                               switch (pipe_format) {
+                               case PIPE_FORMAT_DXT1_SRGB:
+                               case PIPE_FORMAT_DXT1_SRGBA:
+                               case PIPE_FORMAT_DXT3_SRGBA:
+                               case PIPE_FORMAT_DXT5_SRGBA:
+                                       num_format = 
V_008F14_IMG_NUM_FORMAT_SRGB;
+                                       break;
+                               case PIPE_FORMAT_RGTC1_SNORM:
+                               case PIPE_FORMAT_LATC1_SNORM:
+                               case PIPE_FORMAT_RGTC2_SNORM:
+                               case PIPE_FORMAT_LATC2_SNORM:
+                                       num_format = 
V_008F14_IMG_NUM_FORMAT_SNORM;
+                                       break;
+                               default:
+                                       num_format = 
V_008F14_IMG_NUM_FORMAT_UNORM;
+                                       break;
+                               }
+                       } else {
+                               num_format = V_008F14_IMG_NUM_FORMAT_FLOAT;
+                       }
                } else if (desc->colorspace == UTIL_FORMAT_COLORSPACE_SRGB) {
                        num_format = V_008F14_IMG_NUM_FORMAT_SRGB;
                } else {
@@ -2177,20 +2188,22 @@ static struct pipe_sampler_view 
*si_create_sampler_view(struct pipe_context *ctx
                                num_format = V_008F14_IMG_NUM_FORMAT_FLOAT;
                                break;
                        case UTIL_FORMAT_TYPE_SIGNED:
-                               if (desc->channel[first_non_void].normalized)
+                               if (desc->channel[first_non_void].normalized) {
                                        num_format = 
V_008F14_IMG_NUM_FORMAT_SNORM;
-                               else if 
(desc->channel[first_non_void].pure_integer)
+                               } else if 
(desc->channel[first_non_void].pure_integer) {
                                        num_format = 
V_008F14_IMG_NUM_FORMAT_SINT;
-                               else
+                               } else {
                                        num_format = 
V_008F14_IMG_NUM_FORMAT_SSCALED;
+                               }
                                break;
                        case UTIL_FORMAT_TYPE_UNSIGNED:
-                               if (desc->channel[first_non_void].normalized)
+                               if (desc->channel[first_non_void].normalized) {
                                        num_format = 
V_008F14_IMG_NUM_FORMAT_UNORM;
-                               else if 
(desc->channel[first_non_void].pure_integer)
+                               } else if 
(desc->channel[first_non_void].pure_integer) {
                                        num_format = 
V_008F14_IMG_NUM_FORMAT_UINT;
-                               else
+                               } else {
                                        num_format = 
V_008F14_IMG_NUM_FORMAT_USCALED;
+                               }
                        }
                }
        }
@@ -2231,7 +2244,7 @@ static struct pipe_sampler_view 
*si_create_sampler_view(struct pipe_context *ctx
                          S_008F1C_DST_SEL_W(si_map_swizzle(swizzle[3])) |
                          S_008F1C_BASE_LEVEL(state->u.tex.first_level) |
                          S_008F1C_LAST_LEVEL(state->u.tex.last_level) |
-                         S_008F1C_TILING_INDEX(si_tile_mode_index(tmp, 0)) |
+                         S_008F1C_TILING_INDEX(si_tile_mode_index(tmp, 0, 
false)) |
                          S_008F1C_POW2_PAD(texture->last_level > 0) |
                          S_008F1C_TYPE(si_tex_dim(texture->target)));
        view->state[4] = (S_008F20_DEPTH(depth - 1) | S_008F20_PITCH(pitch - 
1));
diff --git a/src/gallium/drivers/radeonsi/sid.h 
b/src/gallium/drivers/radeonsi/sid.h
index 8528981..2722c79 100644
--- a/src/gallium/drivers/radeonsi/sid.h
+++ b/src/gallium/drivers/radeonsi/sid.h
@@ -3434,6 +3434,13 @@
 #define     V_008F14_IMG_DATA_FORMAT_GB_GR                          0x20
 #define     V_008F14_IMG_DATA_FORMAT_BG_RG                          0x21
 #define     V_008F14_IMG_DATA_FORMAT_5_9_9_9                        0x22
+#define     V_008F14_IMG_DATA_FORMAT_BC1                            0x23
+#define     V_008F14_IMG_DATA_FORMAT_BC2                            0x24
+#define     V_008F14_IMG_DATA_FORMAT_BC3                            0x25
+#define     V_008F14_IMG_DATA_FORMAT_BC4                            0x26
+#define     V_008F14_IMG_DATA_FORMAT_BC5                            0x27
+#define     V_008F14_IMG_DATA_FORMAT_BC6                            0x28
+#define     V_008F14_IMG_DATA_FORMAT_BC7                            0x29
 #define     V_008F14_IMG_DATA_FORMAT_RESERVED_42                    0x2A
 #define     V_008F14_IMG_DATA_FORMAT_RESERVED_43                    0x2B
 #define     V_008F14_IMG_DATA_FORMAT_FMASK8_S2_F1                   0x2C
-- 
1.8.1.4

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