These are largely based on the similar fields in brw->wm.

Signed-off-by: Kenneth Graunke <kenn...@whitecape.org>
---
 src/mesa/drivers/dri/i965/brw_context.h | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/src/mesa/drivers/dri/i965/brw_context.h 
b/src/mesa/drivers/dri/i965/brw_context.h
index 57f086b..97c66ab 100644
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -821,15 +821,22 @@ struct brw_query_object {
  */
 struct brw_stage_state
 {
+   /** Scratch buffer */
    drm_intel_bo *scratch_bo;
+
+   /** Pull constant buffer */
    drm_intel_bo *const_bo;
+
    /** Offset in the program cache to the program */
    uint32_t prog_offset;
+
+   /** Offset in the batchbuffer to Gen4-5 pipelined state (VS/WM/GS_STATE). */
    uint32_t state_offset;
 
    uint32_t push_const_offset; /* Offset in the batchbuffer */
    int push_const_size; /* in 256-bit register increments */
 
+   /* Binding table: pointers to SURFACE_STATE entries. */
    uint32_t bind_bo_offset;
    uint32_t surf_offset[BRW_MAX_VEC4_SURFACES];
 
-- 
1.8.3.4

_______________________________________________
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev

Reply via email to