Reviewed-by: Aaron Watry <awa...@gmail.com> I have tested this on a Radeon 5400 (Cedar), and I just sent a few generated tests to the piglit list.
--Aaron On Wed, Oct 23, 2013 at 6:28 PM, Tom Stellard <t...@stellard.net> wrote: > From: Tom Stellard <thomas.stell...@amd.com> > > --- > lib/Target/R600/AMDGPUISelLowering.cpp | 1 + > test/CodeGen/R600/llvm.sqrt.ll | 54 > ++++++++++++++++++++++++++++++++++ > 2 files changed, 55 insertions(+) > create mode 100644 test/CodeGen/R600/llvm.sqrt.ll > > diff --git a/lib/Target/R600/AMDGPUISelLowering.cpp > b/lib/Target/R600/AMDGPUISelLowering.cpp > index 91d85d3..52dd010 100644 > --- a/lib/Target/R600/AMDGPUISelLowering.cpp > +++ b/lib/Target/R600/AMDGPUISelLowering.cpp > @@ -181,6 +181,7 @@ AMDGPUTargetLowering::AMDGPUTargetLowering(TargetMachine > &TM) : > setOperationAction(ISD::FFLOOR, VT, Expand); > setOperationAction(ISD::FMUL, VT, Expand); > setOperationAction(ISD::FRINT, VT, Expand); > + setOperationAction(ISD::FSQRT, VT, Expand); > setOperationAction(ISD::FSUB, VT, Expand); > } > } > diff --git a/test/CodeGen/R600/llvm.sqrt.ll b/test/CodeGen/R600/llvm.sqrt.ll > new file mode 100644 > index 0000000..0d0d186 > --- /dev/null > +++ b/test/CodeGen/R600/llvm.sqrt.ll > @@ -0,0 +1,54 @@ > +; RUN: llc < %s -march=r600 --mcpu=redwood | FileCheck %s > --check-prefix=R600-CHECK > +; RUN: llc < %s -march=r600 --mcpu=SI | FileCheck %s --check-prefix=SI-CHECK > + > +; R600-CHECK-LABEL: @sqrt_f32 > +; R600-CHECK: RECIPSQRT_CLAMPED * T{{[0-9]\.[XYZW]}}, KC0[2].Z > +; R600-CHECK: MUL NON-IEEE T{{[0-9]\.[XYZW]}}, KC0[2].Z, PS > +; SI-CHECK-LABEL: @sqrt_f32 > +; SI-CHECK: V_SQRT_F32_e32 > +define void @sqrt_f32(float addrspace(1)* %out, float %in) { > +entry: > + %0 = call float @llvm.sqrt.f32(float %in) > + store float %0, float addrspace(1)* %out > + ret void > +} > + > +; R600-CHECK-LABEL: @sqrt_v2f32 > +; R600-CHECK-DAG: RECIPSQRT_CLAMPED * T{{[0-9]\.[XYZW]}}, KC0[2].W > +; R600-CHECK-DAG: MUL NON-IEEE T{{[0-9]\.[XYZW]}}, KC0[2].W, PS > +; R600-CHECK-DAG: RECIPSQRT_CLAMPED * T{{[0-9]\.[XYZW]}}, KC0[3].X > +; R600-CHECK-DAG: MUL NON-IEEE T{{[0-9]\.[XYZW]}}, KC0[3].X, PS > +; SI-CHECK-LABEL: @sqrt_v2f32 > +; SI-CHECK: V_SQRT_F32_e32 > +; SI-CHECK: V_SQRT_F32_e32 > +define void @sqrt_v2f32(<2 x float> addrspace(1)* %out, <2 x float> %in) { > +entry: > + %0 = call <2 x float> @llvm.sqrt.v2f32(<2 x float> %in) > + store <2 x float> %0, <2 x float> addrspace(1)* %out > + ret void > +} > + > +; R600-CHECK-LABEL: @sqrt_v4f32 > +; R600-CHECK-DAG: RECIPSQRT_CLAMPED * T{{[0-9]\.[XYZW]}}, KC0[3].Y > +; R600-CHECK-DAG: MUL NON-IEEE T{{[0-9]\.[XYZW]}}, KC0[3].Y, PS > +; R600-CHECK-DAG: RECIPSQRT_CLAMPED * T{{[0-9]\.[XYZW]}}, KC0[3].Z > +; R600-CHECK-DAG: MUL NON-IEEE T{{[0-9]\.[XYZW]}}, KC0[3].Z, PS > +; R600-CHECK-DAG: RECIPSQRT_CLAMPED * T{{[0-9]\.[XYZW]}}, KC0[3].W > +; R600-CHECK-DAG: MUL NON-IEEE T{{[0-9]\.[XYZW]}}, KC0[3].W, PS > +; R600-CHECK-DAG: RECIPSQRT_CLAMPED * T{{[0-9]\.[XYZW]}}, KC0[4].X > +; R600-CHECK-DAG: MUL NON-IEEE T{{[0-9]\.[XYZW]}}, KC0[4].X, PS > +; SI-CHECK-LABEL: @sqrt_v4f32 > +; SI-CHECK: V_SQRT_F32_e32 > +; SI-CHECK: V_SQRT_F32_e32 > +; SI-CHECK: V_SQRT_F32_e32 > +; SI-CHECK: V_SQRT_F32_e32 > +define void @sqrt_v4f32(<4 x float> addrspace(1)* %out, <4 x float> %in) { > +entry: > + %0 = call <4 x float> @llvm.sqrt.v4f32(<4 x float> %in) > + store <4 x float> %0, <4 x float> addrspace(1)* %out > + ret void > +} > + > +declare float @llvm.sqrt.f32(float %in) > +declare <2 x float> @llvm.sqrt.v2f32(<2 x float> %in) > +declare <4 x float> @llvm.sqrt.v4f32(<4 x float> %in) > -- > 1.7.11.4 > > _______________________________________________ > llvm-commits mailing list > llvm-comm...@cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits _______________________________________________ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev