Now that we properly track accumulator dependencies, the scheduler is
able to schedule instructions between the mach and mov in the common
the integer multiplication pattern:
mul acc0, x, y
mach null, x, y
mov dest, acc0
Since a null destination implies no dependency on the destination, we
can also safely schedule instructions (that don't write the accumulator)
between the mul and mach.
---
This depends on JP's accumulator series.
src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp | 12 ++++++++----
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp
b/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp
index 3538da5..910b73a 100644
--- a/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp
+++ b/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp
@@ -864,7 +864,8 @@ fs_instruction_scheduler::calculate_deps()
} else if (inst->dst.is_accumulator()) {
add_dep(last_accumulator_write, n);
last_accumulator_write = n;
- } else if (inst->dst.file != BAD_FILE) {
+ } else if (inst->dst.file != BAD_FILE &&
+ !inst->dst.is_null()) {
add_barrier_deps(n);
}
@@ -983,7 +984,8 @@ fs_instruction_scheduler::calculate_deps()
}
} else if (inst->dst.is_accumulator()) {
last_accumulator_write = n;
- } else if (inst->dst.file != BAD_FILE) {
+ } else if (inst->dst.file != BAD_FILE &&
+ !inst->dst.is_null()) {
add_barrier_deps(n);
}
@@ -1089,7 +1091,8 @@ vec4_instruction_scheduler::calculate_deps()
} else if (inst->dst.is_accumulator()) {
add_dep(last_accumulator_write, n);
last_accumulator_write = n;
- } else if (inst->dst.file != BAD_FILE) {
+ } else if (inst->dst.file != BAD_FILE &&
+ !inst->dst.is_null()) {
add_barrier_deps(n);
}
@@ -1173,7 +1176,8 @@ vec4_instruction_scheduler::calculate_deps()
last_fixed_grf_write = n;
} else if (inst->dst.is_accumulator()) {
last_accumulator_write = n;
- } else if (inst->dst.file != BAD_FILE) {
+ } else if (inst->dst.file != BAD_FILE &&
+ !inst->dst.is_null()) {
add_barrier_deps(n);
}
--
1.8.3.2
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