From: Dave Airlie <airl...@redhat.com>
libdrm patch: but mesa seems more suited to discussion.
According to a tcore statement, the fmask needs to share
pitch with the color surface, and since we pass that color
surface pitch in already, we should use it if the one we
calculate is less.
Now I've no idea if this applies to evergreen/cayman,
or if this is just an r6xx/r7xx, maybe someone at AMD
has a newer version tcore can check.
Signed-off-by: Dave Airlie <airl...@redhat.com>
---
radeon/radeon_surface.c | 10 +++++++++-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/radeon/radeon_surface.c b/radeon/radeon_surface.c
index 930017e..7fc0535 100644
--- a/radeon/radeon_surface.c
+++ b/radeon/radeon_surface.c
@@ -165,6 +165,8 @@ static void surf_minify(struct radeon_surface *surf,
uint32_t xalign, uint32_t yalign, uint32_t zalign,
unsigned offset)
{
+ uint32_t pitch_bytes;
+
surflevel->npix_x = mip_minify(surf->npix_x, level);
surflevel->npix_y = mip_minify(surf->npix_y, level);
surflevel->npix_z = mip_minify(surf->npix_z, level);
@@ -183,7 +185,13 @@ static void surf_minify(struct radeon_surface *surf,
surflevel->nblk_z = ALIGN(surflevel->nblk_z, zalign);
surflevel->offset = offset;
- surflevel->pitch_bytes = surflevel->nblk_x * bpe * surf->nsamples;
+ pitch_bytes = surflevel->nblk_x * bpe * surf->nsamples;
+ if (surf->flags & RADEON_SURF_FMASK) {
+ if (surflevel->pitch_bytes > pitch_bytes)
+ pitch_bytes = surflevel->pitch_bytes;
+ }
+ surflevel->pitch_bytes = pitch_bytes;
+
surflevel->slice_size = surflevel->pitch_bytes * surflevel->nblk_y;
surf->bo_size = offset + surflevel->slice_size * surflevel->nblk_z *
surf->array_size;
--
2.1.0
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