On Friday, February 20, 2015 10:33:18 AM Ben Widawsky wrote: > On Fri, Feb 20, 2015 at 03:34:21AM -0800, Kenneth Graunke wrote: > > On Thursday, February 19, 2015 10:48:08 PM Ben Widawsky wrote: > > > When under dispatch_width=16 the previous code would allocate 2 registers > > > for > > > the payload when only one is needed. This manifested itself through bugs > > > on SKL > > > which needs to mess with this instruction. > > > > > > Ken though this might impact shader-db, but apparently it doesn't > > > > > > Cc: Kenneth Graunke <[email protected]> > > > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89118 > > > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=88999 > > > Signed-off-by: Ben Widawsky <[email protected]> > > > --- > > > src/mesa/drivers/dri/i965/brw_fs.cpp | 2 +- > > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > > > diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp > > > b/src/mesa/drivers/dri/i965/brw_fs.cpp > > > index c46e1d7..24125cc 100644 > > > --- a/src/mesa/drivers/dri/i965/brw_fs.cpp > > > +++ b/src/mesa/drivers/dri/i965/brw_fs.cpp > > > @@ -3062,7 +3062,7 @@ fs_visitor::lower_uniform_pull_constant_loads() > > > assert(const_offset_reg.file == IMM && > > > const_offset_reg.type == BRW_REGISTER_TYPE_UD); > > > const_offset_reg.fixed_hw_reg.dw1.ud /= 4; > > > - fs_reg payload = vgrf(glsl_type::uint_type); > > > + fs_reg payload = fs_reg(GRF, alloc.allocate(1)); > > > > > > /* We have to use a message header on Skylake to get SIMD4x2 > > > mode. > > > * Reserve space for the register. > > > > > > > Reviewed-by: Kenneth Graunke <[email protected]> > > Given that this seems to be required to get SKL stable, do I want to Cc 1.5 > too?
That seems reasonable to me. It likely won't apply (or build), since I don't think 10.5 has alloc.allocate(). To be nice to Emil, I'm guessing the right thing to do is probably to cherry-pick it to 10.5, change alloc.allocate(1) to virtual_grf_alloc(1), and send that patch to [email protected] marking it as a backport.
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