On Tuesday, May 19, 2015 05:37:04 PM Jason Ekstrand wrote:
> We build the entire message in the generator so all the MRF writes are
> implied.
> ---
>  src/mesa/drivers/dri/i965/brw_fs.cpp | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp 
> b/src/mesa/drivers/dri/i965/brw_fs.cpp
> index 9b3186b..42a0d78 100644
> --- a/src/mesa/drivers/dri/i965/brw_fs.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
> @@ -1050,7 +1050,7 @@ fs_visitor::implied_mrf_writes(fs_inst *inst)
>     case FS_OPCODE_VARYING_PULL_CONSTANT_LOAD:
>        return inst->mlen;
>     case SHADER_OPCODE_GEN4_SCRATCH_WRITE:
> -      return 2;
> +      return inst->mlen;
>     case SHADER_OPCODE_UNTYPED_ATOMIC:
>     case SHADER_OPCODE_UNTYPED_SURFACE_READ:
>     case SHADER_OPCODE_UNTYPED_SURFACE_WRITE:
> 

Good catch!

These should be equivalent in SIMD8 mode - we write 1 register
(BRW_DATAPORT_OWORD_BLOCK_2_OWORDS), giving us a mlen of 2.

But for SIMD16, the old code would break, since mlen is 3.

Cc: [email protected]
Reviewed-by: Kenneth Graunke <[email protected]>

Attachment: signature.asc
Description: This is a digitally signed message part.

_______________________________________________
mesa-dev mailing list
[email protected]
http://lists.freedesktop.org/mailman/listinfo/mesa-dev

Reply via email to