On Fri, Jun 26, 2015 at 08:51:59AM +0300, Abdiel Janulgue wrote:
> This patch implements the binding table enable command which is also
> used to allocate a binding table pool where where hardware-generated
> binding table entries are flushed into. Each binding table offset in
> the binding table pool is unique per each shader stage that are
> enabled within a batch.
>
> Also insert the required brw_tracked_state objects to enable
> hw-generated binding tables in normal render path.
>
> v2: - Use MOCS in binding table pool alloc for GEN8
> - Fix spurious offset when allocating binding table pool entry
> and start from zero instead.
> v3 - Include GEN8 fix for spurious offset above.
>
> Cc: kenn...@whitecape.org
> Signed-off-by: Abdiel Janulgue <abdiel.janul...@linux.intel.com>
> ---
> src/mesa/drivers/dri/i965/brw_binding_tables.c | 87
> ++++++++++++++++++++++++++
> src/mesa/drivers/dri/i965/brw_context.c | 4 ++
> src/mesa/drivers/dri/i965/brw_context.h | 6 ++
> src/mesa/drivers/dri/i965/brw_state.h | 6 ++
> src/mesa/drivers/dri/i965/brw_state_upload.c | 4 ++
> src/mesa/drivers/dri/i965/gen7_disable.c | 4 +-
> src/mesa/drivers/dri/i965/gen8_disable.c | 4 +-
> src/mesa/drivers/dri/i965/intel_batchbuffer.c | 4 ++
> 8 files changed, 115 insertions(+), 4 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_binding_tables.c
> b/src/mesa/drivers/dri/i965/brw_binding_tables.c
> index 98ff0dd..6bc540f 100644
> --- a/src/mesa/drivers/dri/i965/brw_binding_tables.c
> +++ b/src/mesa/drivers/dri/i965/brw_binding_tables.c
> @@ -170,6 +170,93 @@ const struct brw_tracked_state brw_gs_binding_table = {
> .emit = brw_gs_upload_binding_table,
> };
>
> +/**
> + * Hardware-generated binding tables for the resource streamer
> + */
> +void
> +gen7_disable_hw_binding_tables(struct brw_context *brw)
> +{
> + int pkt_len = brw->gen >= 8 ? 4 : 3;
How do you anticipate this function being used? As it looks like
a if (!brw->resource_streamer_active) return; would make the function
foolproof.
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
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