Since we can distinguish when mapping between READ and WRITE, we can pass along the map mode to avoid stalls and flushes where possible.
Signed-off-by: Chris Wilson <ch...@chris-wilson.co.uk> --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 28 ++++++++++++++------------- src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 3 ++- 2 files changed, 17 insertions(+), 14 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c index e8bbc04..fcad043 100644 --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c @@ -1401,7 +1401,7 @@ intel_miptree_alloc_mcs(struct brw_context *brw, * * Note: the clear value for MCS buffers is all 1's, so we memset to 0xff. */ - void *data = intel_miptree_map_raw(brw, mt->mcs_mt); + void *data = intel_miptree_map_raw(brw, mt->mcs_mt, GL_MAP_WRITE_BIT); memset(data, 0xff, mt->mcs_mt->total_height * mt->mcs_mt->pitch); intel_miptree_unmap_raw(brw, mt->mcs_mt); mt->fast_clear_state = INTEL_FAST_CLEAR_STATE_CLEAR; @@ -2053,13 +2053,15 @@ intel_miptree_updownsample(struct brw_context *brw, } void * -intel_miptree_map_raw(struct brw_context *brw, struct intel_mipmap_tree *mt) +intel_miptree_map_raw(struct brw_context *brw, + struct intel_mipmap_tree *mt, + GLbitfield mode) { /* CPU accesses to color buffers don't understand fast color clears, so * resolve any pending fast color clears before we map. */ intel_miptree_resolve_color(brw, mt); - return brw_bo_map(mt->bo, MAP_WRITE); + return brw_bo_map(mt->bo, mode & GL_MAP_WRITE_BIT ? MAP_WRITE : MAP_READ); } void @@ -2088,7 +2090,7 @@ intel_miptree_map_gtt(struct brw_context *brw, assert(y % bh == 0); y /= bh; - base = intel_miptree_map_raw(brw, mt) + mt->offset; + base = intel_miptree_map_raw(brw, mt, map->mode) + mt->offset; if (base == NULL) map->ptr = NULL; @@ -2155,7 +2157,7 @@ intel_miptree_map_blit(struct brw_context *brw, } } - map->ptr = intel_miptree_map_raw(brw, map->mt); + map->ptr = intel_miptree_map_raw(brw, map->mt, map->mode); DBG("%s: %d,%d %dx%d from mt %p (%s) %d,%d = %p/%d\n", __func__, map->x, map->y, map->w, map->h, @@ -2219,7 +2221,7 @@ intel_miptree_map_movntdqa(struct brw_context *brw, image_x += map->x; image_y += map->y; - void *src = intel_miptree_map_raw(brw, mt); + void *src = intel_miptree_map_raw(brw, mt, map->mode); if (!src) return; src += image_y * mt->pitch; @@ -2285,7 +2287,7 @@ intel_miptree_map_s8(struct brw_context *brw, */ if (!(map->mode & GL_MAP_INVALIDATE_RANGE_BIT)) { uint8_t *untiled_s8_map = map->ptr; - uint8_t *tiled_s8_map = intel_miptree_map_raw(brw, mt); + uint8_t *tiled_s8_map = intel_miptree_map_raw(brw, mt, GL_MAP_READ_BIT); unsigned int image_x, image_y; intel_miptree_get_image_offset(mt, level, slice, &image_x, &image_y); @@ -2322,7 +2324,7 @@ intel_miptree_unmap_s8(struct brw_context *brw, if (map->mode & GL_MAP_WRITE_BIT) { unsigned int image_x, image_y; uint8_t *untiled_s8_map = map->ptr; - uint8_t *tiled_s8_map = intel_miptree_map_raw(brw, mt); + uint8_t *tiled_s8_map = intel_miptree_map_raw(brw, mt, GL_MAP_WRITE_BIT); intel_miptree_get_image_offset(mt, level, slice, &image_x, &image_y); @@ -2377,7 +2379,7 @@ intel_miptree_unmap_etc(struct brw_context *brw, image_x += map->x; image_y += map->y; - uint8_t *dst = intel_miptree_map_raw(brw, mt) + uint8_t *dst = intel_miptree_map_raw(brw, mt, GL_MAP_WRITE_BIT) + image_y * mt->pitch + image_x * mt->cpp; @@ -2428,8 +2430,8 @@ intel_miptree_map_depthstencil(struct brw_context *brw, */ if (!(map->mode & GL_MAP_INVALIDATE_RANGE_BIT)) { uint32_t *packed_map = map->ptr; - uint8_t *s_map = intel_miptree_map_raw(brw, s_mt); - uint32_t *z_map = intel_miptree_map_raw(brw, z_mt); + uint8_t *s_map = intel_miptree_map_raw(brw, s_mt, GL_MAP_READ_BIT); + uint32_t *z_map = intel_miptree_map_raw(brw, z_mt, GL_MAP_READ_BIT); unsigned int s_image_x, s_image_y; unsigned int z_image_x, z_image_y; @@ -2489,8 +2491,8 @@ intel_miptree_unmap_depthstencil(struct brw_context *brw, if (map->mode & GL_MAP_WRITE_BIT) { uint32_t *packed_map = map->ptr; - uint8_t *s_map = intel_miptree_map_raw(brw, s_mt); - uint32_t *z_map = intel_miptree_map_raw(brw, z_mt); + uint8_t *s_map = intel_miptree_map_raw(brw, s_mt, GL_MAP_WRITE_BIT); + uint32_t *z_map = intel_miptree_map_raw(brw, z_mt, GL_MAP_WRITE_BIT); unsigned int s_image_x, s_image_y; unsigned int z_image_x, z_image_y; diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h index 7e91c97..6c69572 100644 --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h @@ -774,7 +774,8 @@ brw_miptree_layout(struct brw_context *brw, uint32_t layout_flags); void *intel_miptree_map_raw(struct brw_context *brw, - struct intel_mipmap_tree *mt); + struct intel_mipmap_tree *mt, + GLbitfield mode); void intel_miptree_unmap_raw(struct brw_context *brw, struct intel_mipmap_tree *mt); -- 2.1.4 _______________________________________________ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev