The idea here is not that it gives register coalescing a little bit of a
helping hand. It doesn't actually fix the coalescing problems, but it
seems to help a good bit.
Shader-db results for vec4 programs on Haswell:
total instructions in shared programs: 1801527 -> 1761720 (-2.21%)
instructions in affected programs: 978662 -> 938855 (-4.07%)
helped: 7924
HURT: 497
Shader-db results for GLSL IR vs. NIR vec4 on Haswell:
total instructions in shared programs: 1853737 -> 1761720 (-4.96%)
instructions in affected programs: 1686064 -> 1594047 (-5.46%)
helped: 7717
HURT: 9942
---
src/mesa/drivers/dri/i965/brw_nir.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_nir.c
b/src/mesa/drivers/dri/i965/brw_nir.c
index 8f3edc5..7a8e004 100644
--- a/src/mesa/drivers/dri/i965/brw_nir.c
+++ b/src/mesa/drivers/dri/i965/brw_nir.c
@@ -183,6 +183,11 @@ brw_create_nir(struct brw_context *brw,
nir_print_shader(nir, stderr);
}
+ if (!is_scalar) {
+ nir_move_vec_src_uses_to_dest(nir);
+ nir_validate_shader(nir);
+ }
+
nir_convert_from_ssa(nir, is_scalar);
nir_validate_shader(nir);
--
2.5.0.400.gff86faf
_______________________________________________
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev
