ARB_gpu_shader5 should be a decent proxy for whether those instructions
are supported.
Signed-off-by: Ilia Mirkin <imir...@alum.mit.edu>
---
Not actually ready to be committed, since r600/radeonsi need support
for these ops as well. Should be easy to implement, but want to get
the OK before I do so.
src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 16 +++++++++++-----
1 file changed, 11 insertions(+), 5 deletions(-)
diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
index f481e89..fff18a4 100644
--- a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
+++ b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
@@ -2195,15 +2195,20 @@ glsl_to_tgsi_visitor::visit(ir_expression *ir)
}
break;
+ case ir_unop_pack_half_2x16:
+ emit_asm(ir, TGSI_OPCODE_PK2H, result_dst, op[0]);
+ break;
+ case ir_unop_unpack_half_2x16:
+ emit_asm(ir, TGSI_OPCODE_UP2H, result_dst, op[0]);
+ break;
+
case ir_unop_pack_snorm_2x16:
case ir_unop_pack_unorm_2x16:
- case ir_unop_pack_half_2x16:
case ir_unop_pack_snorm_4x8:
case ir_unop_pack_unorm_4x8:
case ir_unop_unpack_snorm_2x16:
case ir_unop_unpack_unorm_2x16:
- case ir_unop_unpack_half_2x16:
case ir_unop_unpack_half_2x16_split_x:
case ir_unop_unpack_half_2x16_split_y:
case ir_unop_unpack_snorm_4x8:
@@ -5794,13 +5799,14 @@ st_link_shader(struct gl_context *ctx, struct
gl_shader_program *prog)
LOWER_PACK_SNORM_4x8 |
LOWER_UNPACK_SNORM_4x8 |
LOWER_UNPACK_UNORM_4x8 |
- LOWER_PACK_UNORM_4x8 |
- LOWER_PACK_HALF_2x16 |
- LOWER_UNPACK_HALF_2x16;
+ LOWER_PACK_UNORM_4x8;
if (ctx->Extensions.ARB_gpu_shader5)
lower_inst |= LOWER_PACK_USE_BFI |
LOWER_PACK_USE_BFE;
+ else
+ lower_inst |= LOWER_PACK_HALF_2x16 |
+ LOWER_UNPACK_HALF_2x16;
lower_packing_builtins(ir, lower_inst);
}
--
2.4.10
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