diff --git a/src/mesa/drivers/dri/common/drirenderbuffer.c b/src/mesa/drivers/dri/common/drirenderbuffer.c
index 4e7e92c..4ee9139 100644
--- a/src/mesa/drivers/dri/common/drirenderbuffer.c
+++ b/src/mesa/drivers/dri/common/drirenderbuffer.c
@@ -101,10 +101,12 @@ driNewRenderbuffer(gl_format format, GLvoid *addr,
          assert(cpp == 4);
          break;
       case MESA_FORMAT_Z24_S8:
+      case MESA_FORMAT_Z24_X8:
          drb->Base.DataType = GL_UNSIGNED_INT_24_8_EXT;
          assert(cpp == 4);
          break;
       case MESA_FORMAT_S8_Z24:
+      case MESA_FORMAT_X8_Z24:
          drb->Base.DataType = GL_UNSIGNED_INT_24_8_EXT;
          assert(cpp == 4);
          break;
diff --git a/src/mesa/drivers/dri/radeon/radeon_common_context.h b/src/mesa/drivers/dri/radeon/radeon_common_context.h
index 0309345..be6ea57 100644
--- a/src/mesa/drivers/dri/radeon/radeon_common_context.h
+++ b/src/mesa/drivers/dri/radeon/radeon_common_context.h
@@ -65,6 +65,16 @@ typedef struct radeon_context *radeonContextPtr;
 #define RADEON_TCL_FALLBACK_TCL_DISABLE       0x80 /* user disable */
 #define RADEON_TCL_FALLBACK_FOGCOORDSPEC      0x100 /* fogcoord, sep. spec light */
 
+/** Formats to use for Z+S or Z surfaces */
+#if defined(RADEON_R200) || defined(RADEON_R300)
+#define RADEON_ZS_FORMAT MESA_FORMAT_Z24_S8
+#define RADEON_Z_FORMAT MESA_FORMAT_Z24_X8
+#else
+#define RADEON_ZS_FORMAT MESA_FORMAT_S8_Z24
+#define RADEON_Z_FORMAT MESA_FORMAT_X8_Z24
+#endif
+
+
 /* The blit width for texture uploads
  */
 #define BLIT_WIDTH_BYTES 1024
diff --git a/src/mesa/drivers/dri/radeon/radeon_fbo.c b/src/mesa/drivers/dri/radeon/radeon_fbo.c
index bf69cd9..6fb9fe8 100644
--- a/src/mesa/drivers/dri/radeon/radeon_fbo.c
+++ b/src/mesa/drivers/dri/radeon/radeon_fbo.c
@@ -121,7 +121,7 @@ radeon_alloc_renderbuffer_storage(GLcontext * ctx, struct gl_renderbuffer *rb,
    case GL_STENCIL_INDEX8_EXT:
    case GL_STENCIL_INDEX16_EXT:
       /* alloc a depth+stencil buffer */
-      rb->Format = MESA_FORMAT_S8_Z24;
+      rb->Format = RADEON_ZS_FORMAT;
       rb->DataType = GL_UNSIGNED_INT_24_8_EXT;
       cpp = 4;
       break;
@@ -133,13 +133,13 @@ radeon_alloc_renderbuffer_storage(GLcontext * ctx, struct gl_renderbuffer *rb,
    case GL_DEPTH_COMPONENT:
    case GL_DEPTH_COMPONENT24:
    case GL_DEPTH_COMPONENT32:
-      rb->Format = MESA_FORMAT_X8_Z24;
+      rb->Format = RADEON_Z_FORMAT;
       rb->DataType = GL_UNSIGNED_INT;
       cpp = 4;
       break;
    case GL_DEPTH_STENCIL_EXT:
    case GL_DEPTH24_STENCIL8_EXT:
-      rb->Format = MESA_FORMAT_S8_Z24;
+      rb->Format = RADEON_ZS_FORMAT;
       rb->DataType = GL_UNSIGNED_INT_24_8_EXT;
       cpp = 4;
       break;
diff --git a/src/mesa/drivers/dri/radeon/radeon_screen.c b/src/mesa/drivers/dri/radeon/radeon_screen.c
index 7a124a8..e820a16 100644
--- a/src/mesa/drivers/dri/radeon/radeon_screen.c
+++ b/src/mesa/drivers/dri/radeon/radeon_screen.c
@@ -1503,14 +1503,14 @@ radeonCreateBuffer( __DRIscreenPrivate *driScrnPriv,
     if (mesaVis->depthBits == 24) {
       if (mesaVis->stencilBits == 8) {
 	struct radeon_renderbuffer *depthStencilRb =
-           radeon_create_renderbuffer(MESA_FORMAT_S8_Z24, driDrawPriv);
+           radeon_create_renderbuffer(RADEON_ZS_FORMAT, driDrawPriv);
 	_mesa_add_renderbuffer(&rfb->base, BUFFER_DEPTH, &depthStencilRb->base);
 	_mesa_add_renderbuffer(&rfb->base, BUFFER_STENCIL, &depthStencilRb->base);
 	depthStencilRb->has_surface = screen->depthHasSurface;
       } else {
 	/* depth renderbuffer */
 	struct radeon_renderbuffer *depth =
-           radeon_create_renderbuffer(MESA_FORMAT_X8_Z24, driDrawPriv);
+           radeon_create_renderbuffer(RADEON_Z_FORMAT, driDrawPriv);
 	_mesa_add_renderbuffer(&rfb->base, BUFFER_DEPTH, &depth->base);
 	depth->has_surface = screen->depthHasSurface;
       }