On Sun, Dec 21, 2014 at 2:06 PM, Alex Gonzalez <[email protected]> wrote: > Without this patch the performance counters in the Cortex A9 core always > return zero.
I suppose you have a JTAG cable connected to the board as per "ERR006259 ARM: Debug/trace functions (PMU, PTM and ETB) are disabled with absence of JTAG_TCK clock after POR" , right? > Signed-off-by: Alex Gonzalez <[email protected]> > --- > ...6q-Set-non-invasive-debug-configuration-p.patch | 42 > ++++++++++++++++++++++ > recipes-kernel/linux/linux-wandboard_3.10.17.bb | 2 ++ > 2 files changed, 44 insertions(+) > create mode 100644 > recipes-kernel/linux/linux-wandboard-3.10.17/0001-ARM-imx-imx6q-Set-non-invasive-debug-configuration-p.patch > > diff --git > a/recipes-kernel/linux/linux-wandboard-3.10.17/0001-ARM-imx-imx6q-Set-non-invasive-debug-configuration-p.patch > > b/recipes-kernel/linux/linux-wandboard-3.10.17/0001-ARM-imx-imx6q-Set-non-invasive-debug-configuration-p.patch > new file mode 100644 > index 000000000000..69826afe25e2 > --- /dev/null > +++ > b/recipes-kernel/linux/linux-wandboard-3.10.17/0001-ARM-imx-imx6q-Set-non-invasive-debug-configuration-p.patch > @@ -0,0 +1,42 @@ > +From: Alex Gonzalez <[email protected]> > +Date: Sun, 21 Dec 2014 16:04:56 +0100 > +Subject: [PATCH] ARM: imx: imx6q: Set non invasive debug configuration > + permission bits. > + > +This is needed in order to use the hardware performance events counters. > + > +http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.faqs/ka16431.html > + > +Signed-off-by: Alex Gonzalez <[email protected]> > +--- > + arch/arm/mach-imx/mach-imx6q.c | 10 ++++++++++ > + 1 file changed, 10 insertions(+) > + > +diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c > +index 5fb11af5643d..e54906a8d442 100644 > +--- a/arch/arm/mach-imx/mach-imx6q.c > ++++ b/arch/arm/mach-imx/mach-imx6q.c > +@@ -304,6 +304,15 @@ static const struct of_dev_auxdata > imx6q_auxdata_lookup[] __initconst = { > + { /* sentinel */ } > + }; > + > ++static void imx6q_armpmu_init(void) > ++{ > ++ /* Configure the non invasive debug configuration registers */ > ++ if (IS_ENABLED(CONFIG_HW_PERF_EVENTS)) { > ++ u32 val = 0b11; > ++ asm volatile("mcr p15, 0, %0, c1, c1, 1" : : "r" (val)); Wouldn't this be required for all CortexA9 instead of mx6 only? It would be nice if you could send this to the linux-arm-kernel for review and proper discussion. Thanks -- _______________________________________________ meta-freescale mailing list [email protected] https://lists.yoctoproject.org/listinfo/meta-freescale
