1) Remove deprecated "pci-dma-compat.h" API 2) Use the "default_groups" instead of obsoleted "default_attrs".
Signed-off-by: Yongxin Liu <[email protected]> --- ...-the-deprecated-pci-dma-compat.h-API.patch | 342 ++++++++++++++++++ .../qat-use-default_groups-in-kobj_type.patch | 57 +++ recipes-extended/qat/qat17_4.14.0-00031.bb | 2 + 3 files changed, 401 insertions(+) create mode 100644 recipes-extended/qat/files/qat-remove-the-deprecated-pci-dma-compat.h-API.patch create mode 100644 recipes-extended/qat/files/qat-use-default_groups-in-kobj_type.patch diff --git a/recipes-extended/qat/files/qat-remove-the-deprecated-pci-dma-compat.h-API.patch b/recipes-extended/qat/files/qat-remove-the-deprecated-pci-dma-compat.h-API.patch new file mode 100644 index 0000000..256634c --- /dev/null +++ b/recipes-extended/qat/files/qat-remove-the-deprecated-pci-dma-compat.h-API.patch @@ -0,0 +1,342 @@ +From 1e0c49ea396926ed752ec179f5391532d83b195d Mon Sep 17 00:00:00 2001 +From: Yongxin Liu <[email protected]> +Date: Tue, 10 May 2022 09:13:39 +0800 +Subject: [PATCH 2/2] qat: remove the deprecated "pci-dma-compat.h" API + +In kernel commit 7968778914e5 ("PCI: Remove the deprecated "pci-dma-compat.h" +API), all usages of the functions defined in "pci-dma-compat.h" have been +removed. + +Upstream-Status: Inappropriate [Code released in tarball form only] + +Signed-off-by: Yongxin Liu <[email protected]> +--- + quickassist/qat/drivers/crypto/qat/qat_200xx/adf_drv.c | 8 ++++---- + quickassist/qat/drivers/crypto/qat/qat_200xxvf/adf_drv.c | 8 ++++---- + quickassist/qat/drivers/crypto/qat/qat_c3xxx/adf_drv.c | 8 ++++---- + quickassist/qat/drivers/crypto/qat/qat_c3xxxvf/adf_drv.c | 8 ++++---- + quickassist/qat/drivers/crypto/qat/qat_c4xxx/adf_drv.c | 8 ++++---- + quickassist/qat/drivers/crypto/qat/qat_c4xxxvf/adf_drv.c | 8 ++++---- + quickassist/qat/drivers/crypto/qat/qat_c62x/adf_drv.c | 8 ++++---- + quickassist/qat/drivers/crypto/qat/qat_c62xvf/adf_drv.c | 8 ++++---- + quickassist/qat/drivers/crypto/qat/qat_d15xx/adf_drv.c | 8 ++++---- + quickassist/qat/drivers/crypto/qat/qat_d15xxvf/adf_drv.c | 8 ++++---- + quickassist/qat/drivers/crypto/qat/qat_dh895xcc/adf_drv.c | 8 ++++---- + .../qat/drivers/crypto/qat/qat_dh895xccvf/adf_drv.c | 8 ++++---- + 12 files changed, 48 insertions(+), 48 deletions(-) + +diff --git a/quickassist/qat/drivers/crypto/qat/qat_200xx/adf_drv.c b/quickassist/qat/drivers/crypto/qat/qat_200xx/adf_drv.c +index 6c8cf02..e1a600f 100644 +--- a/quickassist/qat/drivers/crypto/qat/qat_200xx/adf_drv.c ++++ b/quickassist/qat/drivers/crypto/qat/qat_200xx/adf_drv.c +@@ -187,17 +187,17 @@ static int adf_probe(struct pci_dev *pdev, const struct pci_device_id *ent) + } + + /* set dma identifier */ +- if (pci_set_dma_mask(pdev, DMA_BIT_MASK(48))) { +- if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))) { ++ if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(48))) { ++ if ((dma_set_mask(&pdev->dev, DMA_BIT_MASK(32)))) { + dev_err(&pdev->dev, "No usable DMA configuration\n"); + ret = -EFAULT; + goto out_err_disable; + } else { +- pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); ++ dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32)); + } + + } else { +- pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(48)); ++ dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(48)); + } + + if (pci_request_regions(pdev, ADF_200XX_DEVICE_NAME)) { +diff --git a/quickassist/qat/drivers/crypto/qat/qat_200xxvf/adf_drv.c b/quickassist/qat/drivers/crypto/qat/qat_200xxvf/adf_drv.c +index 4bef020..7d1c2c3 100644 +--- a/quickassist/qat/drivers/crypto/qat/qat_200xxvf/adf_drv.c ++++ b/quickassist/qat/drivers/crypto/qat/qat_200xxvf/adf_drv.c +@@ -158,17 +158,17 @@ static int adf_probe(struct pci_dev *pdev, const struct pci_device_id *ent) + } + + /* set dma identifier */ +- if (pci_set_dma_mask(pdev, DMA_BIT_MASK(48))) { +- if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))) { ++ if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(48))) { ++ if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(32))) { + dev_err(&pdev->dev, "No usable DMA configuration\n"); + ret = -EFAULT; + goto out_err_disable; + } else { +- pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); ++ dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32)); + } + + } else { +- pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(48)); ++ dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(48)); + } + + if (pci_request_regions(pdev, ADF_200XXVF_DEVICE_NAME)) { +diff --git a/quickassist/qat/drivers/crypto/qat/qat_c3xxx/adf_drv.c b/quickassist/qat/drivers/crypto/qat/qat_c3xxx/adf_drv.c +index 36a0127..1ce14a4 100644 +--- a/quickassist/qat/drivers/crypto/qat/qat_c3xxx/adf_drv.c ++++ b/quickassist/qat/drivers/crypto/qat/qat_c3xxx/adf_drv.c +@@ -190,17 +190,17 @@ static int adf_probe(struct pci_dev *pdev, const struct pci_device_id *ent) + } + + /* set dma identifier */ +- if (pci_set_dma_mask(pdev, DMA_BIT_MASK(48))) { +- if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))) { ++ if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(48))) { ++ if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(32))) { + dev_err(&pdev->dev, "No usable DMA configuration\n"); + ret = -EFAULT; + goto out_err_disable; + } else { +- pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); ++ dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32)); + } + + } else { +- pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(48)); ++ dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(48)); + } + + if (pci_request_regions(pdev, ADF_C3XXX_DEVICE_NAME)) { +diff --git a/quickassist/qat/drivers/crypto/qat/qat_c3xxxvf/adf_drv.c b/quickassist/qat/drivers/crypto/qat/qat_c3xxxvf/adf_drv.c +index dd7062f..313f8cd 100644 +--- a/quickassist/qat/drivers/crypto/qat/qat_c3xxxvf/adf_drv.c ++++ b/quickassist/qat/drivers/crypto/qat/qat_c3xxxvf/adf_drv.c +@@ -158,17 +158,17 @@ static int adf_probe(struct pci_dev *pdev, const struct pci_device_id *ent) + } + + /* set dma identifier */ +- if (pci_set_dma_mask(pdev, DMA_BIT_MASK(48))) { +- if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))) { ++ if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(48))) { ++ if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(32))) { + dev_err(&pdev->dev, "No usable DMA configuration\n"); + ret = -EFAULT; + goto out_err_disable; + } else { +- pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); ++ dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32)); + } + + } else { +- pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(48)); ++ dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(48)); + } + + if (pci_request_regions(pdev, ADF_C3XXXVF_DEVICE_NAME)) { +diff --git a/quickassist/qat/drivers/crypto/qat/qat_c4xxx/adf_drv.c b/quickassist/qat/drivers/crypto/qat/qat_c4xxx/adf_drv.c +index 5398dcf..c335363 100644 +--- a/quickassist/qat/drivers/crypto/qat/qat_c4xxx/adf_drv.c ++++ b/quickassist/qat/drivers/crypto/qat/qat_c4xxx/adf_drv.c +@@ -178,17 +178,17 @@ static int adf_probe(struct pci_dev *pdev, const struct pci_device_id *ent) + } + + /* set dma identifier */ +- if (pci_set_dma_mask(pdev, DMA_BIT_MASK(48))) { +- if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))) { ++ if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(48))) { ++ if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(32))) { + dev_err(&pdev->dev, "No usable DMA configuration\n"); + ret = -EFAULT; + goto out_err_disable; + } else { +- pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); ++ dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32)); + } + + } else { +- pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(48)); ++ dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(48)); + } + + if (pci_request_regions(pdev, ADF_C4XXX_DEVICE_NAME)) { +diff --git a/quickassist/qat/drivers/crypto/qat/qat_c4xxxvf/adf_drv.c b/quickassist/qat/drivers/crypto/qat/qat_c4xxxvf/adf_drv.c +index b6b8a13..05c1ba7 100644 +--- a/quickassist/qat/drivers/crypto/qat/qat_c4xxxvf/adf_drv.c ++++ b/quickassist/qat/drivers/crypto/qat/qat_c4xxxvf/adf_drv.c +@@ -157,17 +157,17 @@ static int adf_probe(struct pci_dev *pdev, const struct pci_device_id *ent) + } + + /* set dma identifier */ +- if (pci_set_dma_mask(pdev, DMA_BIT_MASK(48))) { +- if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))) { ++ if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(48))) { ++ if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(32))) { + dev_err(&pdev->dev, "No usable DMA configuration\n"); + ret = -EFAULT; + goto out_err_disable; + } else { +- pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); ++ dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32)); + } + + } else { +- pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(48)); ++ dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(48)); + } + + if (pci_request_regions(pdev, ADF_C4XXXVF_DEVICE_NAME)) { +diff --git a/quickassist/qat/drivers/crypto/qat/qat_c62x/adf_drv.c b/quickassist/qat/drivers/crypto/qat/qat_c62x/adf_drv.c +index b401f4b..783d059 100644 +--- a/quickassist/qat/drivers/crypto/qat/qat_c62x/adf_drv.c ++++ b/quickassist/qat/drivers/crypto/qat/qat_c62x/adf_drv.c +@@ -181,17 +181,17 @@ static int adf_probe(struct pci_dev *pdev, const struct pci_device_id *ent) + } + + /* set dma identifier */ +- if (pci_set_dma_mask(pdev, DMA_BIT_MASK(48))) { +- if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))) { ++ if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(48))) { ++ if ((dma_set_mask(&pdev->dev, DMA_BIT_MASK(32)))) { + dev_err(&pdev->dev, "No usable DMA configuration\n"); + ret = -EFAULT; + goto out_err_disable; + } else { +- pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); ++ dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32)); + } + + } else { +- pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(48)); ++ dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(48)); + } + + if (pci_request_regions(pdev, ADF_C62X_DEVICE_NAME)) { +diff --git a/quickassist/qat/drivers/crypto/qat/qat_c62xvf/adf_drv.c b/quickassist/qat/drivers/crypto/qat/qat_c62xvf/adf_drv.c +index d3cf233..2c03cb4 100644 +--- a/quickassist/qat/drivers/crypto/qat/qat_c62xvf/adf_drv.c ++++ b/quickassist/qat/drivers/crypto/qat/qat_c62xvf/adf_drv.c +@@ -163,17 +163,17 @@ static int adf_probe(struct pci_dev *pdev, const struct pci_device_id *ent) + } + + /* set dma identifier */ +- if (pci_set_dma_mask(pdev, DMA_BIT_MASK(48))) { +- if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))) { ++ if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(48))) { ++ if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(32))) { + dev_err(&pdev->dev, "No usable DMA configuration\n"); + ret = -EFAULT; + goto out_err_disable; + } else { +- pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); ++ dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32)); + } + + } else { +- pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(48)); ++ dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(48)); + } + + if (pci_request_regions(pdev, ADF_C62XVF_DEVICE_NAME)) { +diff --git a/quickassist/qat/drivers/crypto/qat/qat_d15xx/adf_drv.c b/quickassist/qat/drivers/crypto/qat/qat_d15xx/adf_drv.c +index dbe26b1..9a1e4a2 100644 +--- a/quickassist/qat/drivers/crypto/qat/qat_d15xx/adf_drv.c ++++ b/quickassist/qat/drivers/crypto/qat/qat_d15xx/adf_drv.c +@@ -176,17 +176,17 @@ static int adf_probe(struct pci_dev *pdev, const struct pci_device_id *ent) + } + + /* set dma identifier */ +- if (pci_set_dma_mask(pdev, DMA_BIT_MASK(48))) { +- if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))) { ++ if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(48))) { ++ if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(32))) { + dev_err(&pdev->dev, "No usable DMA configuration\n"); + ret = -EFAULT; + goto out_err_disable; + } else { +- pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); ++ dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32)); + } + + } else { +- pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(48)); ++ dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(48)); + } + + if (pci_request_regions(pdev, ADF_D15XX_DEVICE_NAME)) { +diff --git a/quickassist/qat/drivers/crypto/qat/qat_d15xxvf/adf_drv.c b/quickassist/qat/drivers/crypto/qat/qat_d15xxvf/adf_drv.c +index c47e9d9..859437f 100644 +--- a/quickassist/qat/drivers/crypto/qat/qat_d15xxvf/adf_drv.c ++++ b/quickassist/qat/drivers/crypto/qat/qat_d15xxvf/adf_drv.c +@@ -158,17 +158,17 @@ static int adf_probe(struct pci_dev *pdev, const struct pci_device_id *ent) + } + + /* set dma identifier */ +- if (pci_set_dma_mask(pdev, DMA_BIT_MASK(48))) { +- if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))) { ++ if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(48))) { ++ if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(32))) { + dev_err(&pdev->dev, "No usable DMA configuration\n"); + ret = -EFAULT; + goto out_err_disable; + } else { +- pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); ++ dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32)); + } + + } else { +- pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(48)); ++ dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(48)); + } + + if (pci_request_regions(pdev, ADF_D15XXVF_DEVICE_NAME)) { +diff --git a/quickassist/qat/drivers/crypto/qat/qat_dh895xcc/adf_drv.c b/quickassist/qat/drivers/crypto/qat/qat_dh895xcc/adf_drv.c +index 22c0bbf..2f2e941 100644 +--- a/quickassist/qat/drivers/crypto/qat/qat_dh895xcc/adf_drv.c ++++ b/quickassist/qat/drivers/crypto/qat/qat_dh895xcc/adf_drv.c +@@ -176,17 +176,17 @@ static int adf_probe(struct pci_dev *pdev, const struct pci_device_id *ent) + } + + /* set dma identifier */ +- if (pci_set_dma_mask(pdev, DMA_BIT_MASK(48))) { +- if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))) { ++ if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(48))) { ++ if (dma_set_mask(&pdev->dev,DMA_BIT_MASK(32))) { + dev_err(&pdev->dev, "No usable DMA configuration\n"); + ret = -EFAULT; + goto out_err_disable; + } else { +- pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); ++ dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32)); + } + + } else { +- pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(48)); ++ dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(48)); + } + + if (pci_request_regions(pdev, ADF_DH895XCC_DEVICE_NAME)) { +diff --git a/quickassist/qat/drivers/crypto/qat/qat_dh895xccvf/adf_drv.c b/quickassist/qat/drivers/crypto/qat/qat_dh895xccvf/adf_drv.c +index 92b7985..ae0f459 100644 +--- a/quickassist/qat/drivers/crypto/qat/qat_dh895xccvf/adf_drv.c ++++ b/quickassist/qat/drivers/crypto/qat/qat_dh895xccvf/adf_drv.c +@@ -156,17 +156,17 @@ static int adf_probe(struct pci_dev *pdev, const struct pci_device_id *ent) + } + + /* set dma identifier */ +- if (pci_set_dma_mask(pdev, DMA_BIT_MASK(48))) { +- if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))) { ++ if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(48))) { ++ if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(32))) { + dev_err(&pdev->dev, "No usable DMA configuration\n"); + ret = -EFAULT; + goto out_err_disable; + } else { +- pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); ++ dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32)); + } + + } else { +- pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(48)); ++ dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(48)); + } + + if (pci_request_regions(pdev, ADF_DH895XCCVF_DEVICE_NAME)) { +-- +2.34.1 + diff --git a/recipes-extended/qat/files/qat-use-default_groups-in-kobj_type.patch b/recipes-extended/qat/files/qat-use-default_groups-in-kobj_type.patch new file mode 100644 index 0000000..f400eb7 --- /dev/null +++ b/recipes-extended/qat/files/qat-use-default_groups-in-kobj_type.patch @@ -0,0 +1,57 @@ +From bc910686202ff06afa778af5533dec70a1794909 Mon Sep 17 00:00:00 2001 +From: Yongxin Liu <[email protected]> +Date: Mon, 9 May 2022 23:30:24 +0000 +Subject: [PATCH 1/2] qat: use default_groups in kobj_type + +default_attrs was removed in kernel commit cdb4f26a63c3 ("kobject: +kobj_type: remove default_attrs"), use the default_groups pointer +instead. + +Upstream-Status: Inappropriate [Code released in tarball form only] + +Signed-off-by: Yongxin Liu <[email protected]> +--- + .../qat/drivers/crypto/qat/qat_common/adf_uio_control.c | 6 ++++-- + 1 file changed, 4 insertions(+), 2 deletions(-) + +diff --git a/quickassist/qat/drivers/crypto/qat/qat_common/adf_uio_control.c b/quickassist/qat/drivers/crypto/qat/qat_common/adf_uio_control.c +index 26cfe58..e653d0b 100644 +--- a/quickassist/qat/drivers/crypto/qat/qat_common/adf_uio_control.c ++++ b/quickassist/qat/drivers/crypto/qat/qat_common/adf_uio_control.c +@@ -82,6 +82,7 @@ static struct attribute *accel_default_attrs[] = { + &accel_sku.attr, + NULL, + }; ++ATTRIBUTE_GROUPS(accel_default); + + static ssize_t accel_show(struct kobject *kobj, struct attribute *attr, + char *buf); +@@ -176,6 +177,7 @@ static struct attribute *bundle_default_attrs[] = { + &bundle_rings_reserved.attr, + NULL, + }; ++ATTRIBUTE_GROUPS(bundle_default); + + static ssize_t bundle_show(struct kobject *kobj, struct attribute *attr, + char *buf); +@@ -226,7 +228,7 @@ static void adf_uio_sysfs_cleanup(struct adf_accel_dev *accel_dev) + static struct kobj_type accel_ktype = { + .release = accel_kobject_free, + .sysfs_ops = &accel_sysfs_ops, +- .default_attrs = accel_default_attrs, ++ .default_groups = accel_default_groups, + }; + + int adf_uio_sysfs_create(struct adf_accel_dev *accel_dev) +@@ -265,7 +267,7 @@ int adf_uio_sysfs_create(struct adf_accel_dev *accel_dev) + static struct kobj_type bundle_ktype = { + .release = bundle_kobject_free, + .sysfs_ops = &bundle_sysfs_ops, +- .default_attrs = bundle_default_attrs, ++ .default_groups = bundle_default_groups, + }; + + int adf_uio_sysfs_bundle_create(struct pci_dev *pdev, +-- +2.34.1 + diff --git a/recipes-extended/qat/qat17_4.14.0-00031.bb b/recipes-extended/qat/qat17_4.14.0-00031.bb index 8531907..5c7e78c 100644 --- a/recipes-extended/qat/qat17_4.14.0-00031.bb +++ b/recipes-extended/qat/qat17_4.14.0-00031.bb @@ -23,6 +23,8 @@ SRC_URI = "https://downloadmirror.intel.com/30178/eng/QAT1.7.L.4.14.0-00031.tar. file://0009-crypto-qat-Silence-smp_processor_id-warning.patch \ file://0011-qat17-use-namespace-CRYPTO_INTERNAL.patch \ file://0001-usdm_drv-convert-mutex_lock-to-mutex_trylock-to-avio.patch \ + file://qat-use-default_groups-in-kobj_type.patch \ + file://qat-remove-the-deprecated-pci-dma-compat.h-API.patch \ " do_configure[depends] += "virtual/kernel:do_shared_workdir" -- 2.29.2
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