Update the recipe to the current master of u-boot-xlnx vendor tree, in preparation for the xilinx-v2016.1 release.
Update the KC705 configuration patch and remove upstreamed patches for MicroBlaze. Signed-off-by: Nathan Rossi <[email protected]> --- ...croblaze-Fix-style-issues-in-header-files.patch | 236 ------- ...Fix-C99-gnu99-compatiblity-for-inline-fun.patch | 239 ------- ...kc705-trd-Convert-microblaze-generic-to-k.patch | 707 +++++++++++++++++---- recipes-bsp/u-boot/u-boot-xlnx_2015.07.bb | 31 - recipes-bsp/u-boot/u-boot-xlnx_2016.01.bb | 28 + 5 files changed, 602 insertions(+), 639 deletions(-) delete mode 100644 recipes-bsp/u-boot/u-boot-xlnx/0001-microblaze-Fix-style-issues-in-header-files.patch delete mode 100644 recipes-bsp/u-boot/u-boot-xlnx/0002-microblaze-Fix-C99-gnu99-compatiblity-for-inline-fun.patch delete mode 100644 recipes-bsp/u-boot/u-boot-xlnx_2015.07.bb create mode 100644 recipes-bsp/u-boot/u-boot-xlnx_2016.01.bb diff --git a/recipes-bsp/u-boot/u-boot-xlnx/0001-microblaze-Fix-style-issues-in-header-files.patch b/recipes-bsp/u-boot/u-boot-xlnx/0001-microblaze-Fix-style-issues-in-header-files.patch deleted file mode 100644 index f81aee4..0000000 --- a/recipes-bsp/u-boot/u-boot-xlnx/0001-microblaze-Fix-style-issues-in-header-files.patch +++ /dev/null @@ -1,236 +0,0 @@ -From 4a4d9396b889686914101607417bc094e43060e4 Mon Sep 17 00:00:00 2001 -From: Nathan Rossi <[email protected]> -Date: Fri, 6 Nov 2015 19:25:05 +1000 -Subject: [PATCH 1/2] microblaze: Fix style issues in header files - -Fix various style issues in MicroBlaze header files. Specifically fixing -style voilations including '__inline__', 'foo * bar' and 'void foo ('. - -Signed-off-by: Nathan Rossi <[email protected]> -Cc: Michal Simek <[email protected]> -Cc: Tom Rini <[email protected]> -Signed-off-by: Michal Simek <[email protected]> -Upstream-Status: Backport ---- - arch/microblaze/include/asm/bitops.h | 66 ++++++++++++++++++------------------ - arch/microblaze/include/asm/system.h | 2 +- - 2 files changed, 34 insertions(+), 34 deletions(-) - -diff --git a/arch/microblaze/include/asm/bitops.h b/arch/microblaze/include/asm/bitops.h -index d24f2cf..178c94f 100644 ---- a/arch/microblaze/include/asm/bitops.h -+++ b/arch/microblaze/include/asm/bitops.h -@@ -21,31 +21,31 @@ - * The __ functions are not atomic - */ - --extern void set_bit(int nr, volatile void * addr); --extern void __set_bit(int nr, volatile void * addr); -+extern void set_bit(int nr, volatile void *addr); -+extern void __set_bit(int nr, volatile void *addr); - --extern void clear_bit(int nr, volatile void * addr); -+extern void clear_bit(int nr, volatile void *addr); - #define __clear_bit(nr, addr) clear_bit(nr, addr) - #define PLATFORM__CLEAR_BIT - --extern void change_bit(int nr, volatile void * addr); --extern void __change_bit(int nr, volatile void * addr); --extern int test_and_set_bit(int nr, volatile void * addr); --extern int __test_and_set_bit(int nr, volatile void * addr); --extern int test_and_clear_bit(int nr, volatile void * addr); --extern int __test_and_clear_bit(int nr, volatile void * addr); --extern int test_and_change_bit(int nr, volatile void * addr); --extern int __test_and_change_bit(int nr, volatile void * addr); --extern int __constant_test_bit(int nr, const volatile void * addr); --extern int __test_bit(int nr, volatile void * addr); --extern int find_first_zero_bit(void * addr, unsigned size); --extern int find_next_zero_bit (void * addr, int size, int offset); -+extern void change_bit(int nr, volatile void *addr); -+extern void __change_bit(int nr, volatile void *addr); -+extern int test_and_set_bit(int nr, volatile void *addr); -+extern int __test_and_set_bit(int nr, volatile void *addr); -+extern int test_and_clear_bit(int nr, volatile void *addr); -+extern int __test_and_clear_bit(int nr, volatile void *addr); -+extern int test_and_change_bit(int nr, volatile void *addr); -+extern int __test_and_change_bit(int nr, volatile void *addr); -+extern int __constant_test_bit(int nr, const volatile void *addr); -+extern int __test_bit(int nr, volatile void *addr); -+extern int find_first_zero_bit(void *addr, unsigned size); -+extern int find_next_zero_bit(void *addr, int size, int offset); - - /* - * ffz = Find First Zero in word. Undefined if no zero exists, - * so code should check against ~0UL first.. - */ --extern __inline__ unsigned long ffz(unsigned long word) -+extern inline unsigned long ffz(unsigned long word) - { - unsigned long result = 0; - -@@ -57,7 +57,7 @@ extern __inline__ unsigned long ffz(unsigned long word) - } - - --extern __inline__ void set_bit(int nr, volatile void * addr) -+extern inline void set_bit(int nr, volatile void *addr) - { - int * a = (int *) addr; - int mask; -@@ -70,7 +70,7 @@ extern __inline__ void set_bit(int nr, volatile void * addr) - restore_flags(flags); - } - --extern __inline__ void __set_bit(int nr, volatile void * addr) -+extern inline void __set_bit(int nr, volatile void *addr) - { - int * a = (int *) addr; - int mask; -@@ -87,7 +87,7 @@ extern __inline__ void __set_bit(int nr, volatile void * addr) - #define smp_mb__before_clear_bit() barrier() - #define smp_mb__after_clear_bit() barrier() - --extern __inline__ void clear_bit(int nr, volatile void * addr) -+extern inline void clear_bit(int nr, volatile void *addr) - { - int * a = (int *) addr; - int mask; -@@ -100,7 +100,7 @@ extern __inline__ void clear_bit(int nr, volatile void * addr) - restore_flags(flags); - } - --extern __inline__ void change_bit(int nr, volatile void * addr) -+extern inline void change_bit(int nr, volatile void *addr) - { - int mask; - unsigned long flags; -@@ -113,7 +113,7 @@ extern __inline__ void change_bit(int nr, volatile void * addr) - restore_flags(flags); - } - --extern __inline__ void __change_bit(int nr, volatile void * addr) -+extern inline void __change_bit(int nr, volatile void *addr) - { - int mask; - unsigned long *ADDR = (unsigned long *) addr; -@@ -123,7 +123,7 @@ extern __inline__ void __change_bit(int nr, volatile void * addr) - *ADDR ^= mask; - } - --extern __inline__ int test_and_set_bit(int nr, volatile void * addr) -+extern inline int test_and_set_bit(int nr, volatile void *addr) - { - int mask, retval; - volatile unsigned int *a = (volatile unsigned int *) addr; -@@ -139,7 +139,7 @@ extern __inline__ int test_and_set_bit(int nr, volatile void * addr) - return retval; - } - --extern __inline__ int __test_and_set_bit(int nr, volatile void * addr) -+extern inline int __test_and_set_bit(int nr, volatile void *addr) - { - int mask, retval; - volatile unsigned int *a = (volatile unsigned int *) addr; -@@ -151,7 +151,7 @@ extern __inline__ int __test_and_set_bit(int nr, volatile void * addr) - return retval; - } - --extern __inline__ int test_and_clear_bit(int nr, volatile void * addr) -+extern inline int test_and_clear_bit(int nr, volatile void *addr) - { - int mask, retval; - volatile unsigned int *a = (volatile unsigned int *) addr; -@@ -167,7 +167,7 @@ extern __inline__ int test_and_clear_bit(int nr, volatile void * addr) - return retval; - } - --extern __inline__ int __test_and_clear_bit(int nr, volatile void * addr) -+extern inline int __test_and_clear_bit(int nr, volatile void *addr) - { - int mask, retval; - volatile unsigned int *a = (volatile unsigned int *) addr; -@@ -179,7 +179,7 @@ extern __inline__ int __test_and_clear_bit(int nr, volatile void * addr) - return retval; - } - --extern __inline__ int test_and_change_bit(int nr, volatile void * addr) -+extern inline int test_and_change_bit(int nr, volatile void *addr) - { - int mask, retval; - volatile unsigned int *a = (volatile unsigned int *) addr; -@@ -195,7 +195,7 @@ extern __inline__ int test_and_change_bit(int nr, volatile void * addr) - return retval; - } - --extern __inline__ int __test_and_change_bit(int nr, volatile void * addr) -+extern inline int __test_and_change_bit(int nr, volatile void *addr) - { - int mask, retval; - volatile unsigned int *a = (volatile unsigned int *) addr; -@@ -210,12 +210,12 @@ extern __inline__ int __test_and_change_bit(int nr, volatile void * addr) - /* - * This routine doesn't need to be atomic. - */ --extern __inline__ int __constant_test_bit(int nr, const volatile void * addr) -+extern inline int __constant_test_bit(int nr, const volatile void *addr) - { - return ((1UL << (nr & 31)) & (((const volatile unsigned int *) addr)[nr >> 5])) != 0; - } - --extern __inline__ int __test_bit(int nr, volatile void * addr) -+extern inline int __test_bit(int nr, volatile void *addr) - { - int * a = (int *) addr; - int mask; -@@ -233,7 +233,7 @@ extern __inline__ int __test_bit(int nr, volatile void * addr) - #define find_first_zero_bit(addr, size) \ - find_next_zero_bit((addr), (size), 0) - --extern __inline__ int find_next_zero_bit (void * addr, int size, int offset) -+extern inline int find_next_zero_bit(void *addr, int size, int offset) - { - unsigned long *p = ((unsigned long *) addr) + (offset >> 5); - unsigned long result = offset & ~31UL; -@@ -279,7 +279,7 @@ found_middle: - #define hweight8(x) generic_hweight8(x) - - --extern __inline__ int ext2_set_bit(int nr, volatile void * addr) -+extern inline int ext2_set_bit(int nr, volatile void *addr) - { - int mask, retval; - unsigned long flags; -@@ -294,7 +294,7 @@ extern __inline__ int ext2_set_bit(int nr, volatile void * addr) - return retval; - } - --extern __inline__ int ext2_clear_bit(int nr, volatile void * addr) -+extern inline int ext2_clear_bit(int nr, volatile void *addr) - { - int mask, retval; - unsigned long flags; -@@ -309,7 +309,7 @@ extern __inline__ int ext2_clear_bit(int nr, volatile void * addr) - return retval; - } - --extern __inline__ int ext2_test_bit(int nr, const volatile void * addr) -+extern inline int ext2_test_bit(int nr, const volatile void *addr) - { - int mask; - const volatile unsigned char *ADDR = (const unsigned char *) addr; -diff --git a/arch/microblaze/include/asm/system.h b/arch/microblaze/include/asm/system.h -index 0297a11..3090835 100644 ---- a/arch/microblaze/include/asm/system.h -+++ b/arch/microblaze/include/asm/system.h -@@ -131,7 +131,7 @@ extern void *switch_thread (struct thread_struct *last, - ((__typeof__ (*(ptr)))__xchg ((unsigned long)(with), (ptr), sizeof (*(ptr)))) - #define tas(ptr) (xchg ((ptr), 1)) - --extern inline unsigned long __xchg (unsigned long with, -+extern inline unsigned long __xchg(unsigned long with, - __volatile__ void *ptr, int size) - { - unsigned long tmp, flags; --- -2.6.2 - diff --git a/recipes-bsp/u-boot/u-boot-xlnx/0002-microblaze-Fix-C99-gnu99-compatiblity-for-inline-fun.patch b/recipes-bsp/u-boot/u-boot-xlnx/0002-microblaze-Fix-C99-gnu99-compatiblity-for-inline-fun.patch deleted file mode 100644 index d334867..0000000 --- a/recipes-bsp/u-boot/u-boot-xlnx/0002-microblaze-Fix-C99-gnu99-compatiblity-for-inline-fun.patch +++ /dev/null @@ -1,239 +0,0 @@ -From ccd0c906131053b11790a6be076e2cf4f71fed10 Mon Sep 17 00:00:00 2001 -From: Nathan Rossi <[email protected]> -Date: Fri, 6 Nov 2015 19:25:06 +1000 -Subject: [PATCH 2/2] microblaze: Fix C99/gnu99 compatiblity for inline - functions - -'extern inline' is not portable across various C standards. To ensure -compatiblity with various standards/compilers change the functions to -static inline. This is a portable construct and serves as a comparable -definition to 'extern inline' from the gnu90 standard. - -Additionally remove the function prototypes as they are not required due -to the functions being declared static and functions are correctly -ordered based on dependence. - -Signed-off-by: Nathan Rossi <[email protected]> -Cc: Michal Simek <[email protected]> -Cc: Tom Rini <[email protected]> -Acked-by: Mans Rullgard <[email protected]> -Signed-off-by: Michal Simek <[email protected]> -Upstream-Status: Backport ---- - arch/microblaze/include/asm/bitops.h | 63 ++++++++++++------------------------ - arch/microblaze/include/asm/system.h | 2 +- - 2 files changed, 22 insertions(+), 43 deletions(-) - -diff --git a/arch/microblaze/include/asm/bitops.h b/arch/microblaze/include/asm/bitops.h -index 178c94f..2cab2ac 100644 ---- a/arch/microblaze/include/asm/bitops.h -+++ b/arch/microblaze/include/asm/bitops.h -@@ -14,38 +14,14 @@ - - #ifdef __KERNEL__ - /* -- * Function prototypes to keep gcc -Wall happy -- */ -- --/* - * The __ functions are not atomic - */ - --extern void set_bit(int nr, volatile void *addr); --extern void __set_bit(int nr, volatile void *addr); -- --extern void clear_bit(int nr, volatile void *addr); --#define __clear_bit(nr, addr) clear_bit(nr, addr) --#define PLATFORM__CLEAR_BIT -- --extern void change_bit(int nr, volatile void *addr); --extern void __change_bit(int nr, volatile void *addr); --extern int test_and_set_bit(int nr, volatile void *addr); --extern int __test_and_set_bit(int nr, volatile void *addr); --extern int test_and_clear_bit(int nr, volatile void *addr); --extern int __test_and_clear_bit(int nr, volatile void *addr); --extern int test_and_change_bit(int nr, volatile void *addr); --extern int __test_and_change_bit(int nr, volatile void *addr); --extern int __constant_test_bit(int nr, const volatile void *addr); --extern int __test_bit(int nr, volatile void *addr); --extern int find_first_zero_bit(void *addr, unsigned size); --extern int find_next_zero_bit(void *addr, int size, int offset); -- - /* - * ffz = Find First Zero in word. Undefined if no zero exists, - * so code should check against ~0UL first.. - */ --extern inline unsigned long ffz(unsigned long word) -+static inline unsigned long ffz(unsigned long word) - { - unsigned long result = 0; - -@@ -57,7 +33,7 @@ extern inline unsigned long ffz(unsigned long word) - } - - --extern inline void set_bit(int nr, volatile void *addr) -+static inline void set_bit(int nr, volatile void *addr) - { - int * a = (int *) addr; - int mask; -@@ -70,7 +46,7 @@ extern inline void set_bit(int nr, volatile void *addr) - restore_flags(flags); - } - --extern inline void __set_bit(int nr, volatile void *addr) -+static inline void __set_bit(int nr, volatile void *addr) - { - int * a = (int *) addr; - int mask; -@@ -87,7 +63,7 @@ extern inline void __set_bit(int nr, volatile void *addr) - #define smp_mb__before_clear_bit() barrier() - #define smp_mb__after_clear_bit() barrier() - --extern inline void clear_bit(int nr, volatile void *addr) -+static inline void clear_bit(int nr, volatile void *addr) - { - int * a = (int *) addr; - int mask; -@@ -100,7 +76,10 @@ extern inline void clear_bit(int nr, volatile void *addr) - restore_flags(flags); - } - --extern inline void change_bit(int nr, volatile void *addr) -+#define __clear_bit(nr, addr) clear_bit(nr, addr) -+#define PLATFORM__CLEAR_BIT -+ -+static inline void change_bit(int nr, volatile void *addr) - { - int mask; - unsigned long flags; -@@ -113,7 +92,7 @@ extern inline void change_bit(int nr, volatile void *addr) - restore_flags(flags); - } - --extern inline void __change_bit(int nr, volatile void *addr) -+static inline void __change_bit(int nr, volatile void *addr) - { - int mask; - unsigned long *ADDR = (unsigned long *) addr; -@@ -123,7 +102,7 @@ extern inline void __change_bit(int nr, volatile void *addr) - *ADDR ^= mask; - } - --extern inline int test_and_set_bit(int nr, volatile void *addr) -+static inline int test_and_set_bit(int nr, volatile void *addr) - { - int mask, retval; - volatile unsigned int *a = (volatile unsigned int *) addr; -@@ -139,7 +118,7 @@ extern inline int test_and_set_bit(int nr, volatile void *addr) - return retval; - } - --extern inline int __test_and_set_bit(int nr, volatile void *addr) -+static inline int __test_and_set_bit(int nr, volatile void *addr) - { - int mask, retval; - volatile unsigned int *a = (volatile unsigned int *) addr; -@@ -151,7 +130,7 @@ extern inline int __test_and_set_bit(int nr, volatile void *addr) - return retval; - } - --extern inline int test_and_clear_bit(int nr, volatile void *addr) -+static inline int test_and_clear_bit(int nr, volatile void *addr) - { - int mask, retval; - volatile unsigned int *a = (volatile unsigned int *) addr; -@@ -167,7 +146,7 @@ extern inline int test_and_clear_bit(int nr, volatile void *addr) - return retval; - } - --extern inline int __test_and_clear_bit(int nr, volatile void *addr) -+static inline int __test_and_clear_bit(int nr, volatile void *addr) - { - int mask, retval; - volatile unsigned int *a = (volatile unsigned int *) addr; -@@ -179,7 +158,7 @@ extern inline int __test_and_clear_bit(int nr, volatile void *addr) - return retval; - } - --extern inline int test_and_change_bit(int nr, volatile void *addr) -+static inline int test_and_change_bit(int nr, volatile void *addr) - { - int mask, retval; - volatile unsigned int *a = (volatile unsigned int *) addr; -@@ -195,7 +174,7 @@ extern inline int test_and_change_bit(int nr, volatile void *addr) - return retval; - } - --extern inline int __test_and_change_bit(int nr, volatile void *addr) -+static inline int __test_and_change_bit(int nr, volatile void *addr) - { - int mask, retval; - volatile unsigned int *a = (volatile unsigned int *) addr; -@@ -210,12 +189,12 @@ extern inline int __test_and_change_bit(int nr, volatile void *addr) - /* - * This routine doesn't need to be atomic. - */ --extern inline int __constant_test_bit(int nr, const volatile void *addr) -+static inline int __constant_test_bit(int nr, const volatile void *addr) - { - return ((1UL << (nr & 31)) & (((const volatile unsigned int *) addr)[nr >> 5])) != 0; - } - --extern inline int __test_bit(int nr, volatile void *addr) -+static inline int __test_bit(int nr, volatile void *addr) - { - int * a = (int *) addr; - int mask; -@@ -233,7 +212,7 @@ extern inline int __test_bit(int nr, volatile void *addr) - #define find_first_zero_bit(addr, size) \ - find_next_zero_bit((addr), (size), 0) - --extern inline int find_next_zero_bit(void *addr, int size, int offset) -+static inline int find_next_zero_bit(void *addr, int size, int offset) - { - unsigned long *p = ((unsigned long *) addr) + (offset >> 5); - unsigned long result = offset & ~31UL; -@@ -279,7 +258,7 @@ found_middle: - #define hweight8(x) generic_hweight8(x) - - --extern inline int ext2_set_bit(int nr, volatile void *addr) -+static inline int ext2_set_bit(int nr, volatile void *addr) - { - int mask, retval; - unsigned long flags; -@@ -294,7 +273,7 @@ extern inline int ext2_set_bit(int nr, volatile void *addr) - return retval; - } - --extern inline int ext2_clear_bit(int nr, volatile void *addr) -+static inline int ext2_clear_bit(int nr, volatile void *addr) - { - int mask, retval; - unsigned long flags; -@@ -309,7 +288,7 @@ extern inline int ext2_clear_bit(int nr, volatile void *addr) - return retval; - } - --extern inline int ext2_test_bit(int nr, const volatile void *addr) -+static inline int ext2_test_bit(int nr, const volatile void *addr) - { - int mask; - const volatile unsigned char *ADDR = (const unsigned char *) addr; -diff --git a/arch/microblaze/include/asm/system.h b/arch/microblaze/include/asm/system.h -index 3090835..3107748 100644 ---- a/arch/microblaze/include/asm/system.h -+++ b/arch/microblaze/include/asm/system.h -@@ -131,7 +131,7 @@ extern void *switch_thread (struct thread_struct *last, - ((__typeof__ (*(ptr)))__xchg ((unsigned long)(with), (ptr), sizeof (*(ptr)))) - #define tas(ptr) (xchg ((ptr), 1)) - --extern inline unsigned long __xchg(unsigned long with, -+static inline unsigned long __xchg(unsigned long with, - __volatile__ void *ptr, int size) - { - unsigned long tmp, flags; --- -2.6.2 - diff --git a/recipes-bsp/u-boot/u-boot-xlnx/microblaze-kc705-trd-Convert-microblaze-generic-to-k.patch b/recipes-bsp/u-boot/u-boot-xlnx/microblaze-kc705-trd-Convert-microblaze-generic-to-k.patch index e9974f4..47601e7 100644 --- a/recipes-bsp/u-boot/u-boot-xlnx/microblaze-kc705-trd-Convert-microblaze-generic-to-k.patch +++ b/recipes-bsp/u-boot/u-boot-xlnx/microblaze-kc705-trd-Convert-microblaze-generic-to-k.patch @@ -1,6 +1,6 @@ -From 0a6818050dcc711f36bd96decc7a2abba5871928 Mon Sep 17 00:00:00 2001 +From 36651e266a840e0767e8f1b6d0ff4944f96cbdcf Mon Sep 17 00:00:00 2001 From: Nathan Rossi <[email protected]> -Date: Wed, 6 Jan 2016 15:40:17 +1000 +Date: Thu, 31 Mar 2016 18:15:02 +1000 Subject: [PATCH] microblaze: kc705-trd: Convert microblaze-generic to kc705-trd @@ -12,24 +12,543 @@ microblaze boards. Signed-off-by: Nathan Rossi <[email protected]> Upstream-Status: Not-Upstreamable [meta-xilinx/kc705 specific] --- - arch/microblaze/dts/microblaze-generic.dts | 4 ++ - board/xilinx/microblaze-generic/config.mk | 23 +++---- - board/xilinx/microblaze-generic/xparameters.h | 86 ++++++++++----------------- - include/configs/microblaze-generic.h | 11 ++-- - 4 files changed, 52 insertions(+), 72 deletions(-) + arch/microblaze/dts/microblaze-generic.dts | 520 ++++++++++++++++++++++++++ + board/xilinx/microblaze-generic/config.mk | 23 +- + board/xilinx/microblaze-generic/xparameters.h | 16 +- + configs/microblaze-generic_defconfig | 5 +- + include/configs/microblaze-generic.h | 4 +- + 5 files changed, 540 insertions(+), 28 deletions(-) diff --git a/arch/microblaze/dts/microblaze-generic.dts b/arch/microblaze/dts/microblaze-generic.dts -index 2033309..8c21cd3 100644 +index 2033309..7faf61d 100644 --- a/arch/microblaze/dts/microblaze-generic.dts +++ b/arch/microblaze/dts/microblaze-generic.dts -@@ -4,4 +4,8 @@ +@@ -2,6 +2,526 @@ + / { + #address-cells = <1>; #size-cells = <1>; - aliases { - } ; -+ memory: memory@80000000 { ++ compatible = "xlnx,microblaze"; ++ model = "Xilinx-KC705-TRD"; ++ ddr3_sdram: memory@80000000 { + device_type = "memory"; -+ reg = <0x80000000 0x40000000>; ++ reg = < 0x80000000 0x40000000 >; ++ } ; + aliases { ++ ethernet0 = &soft_ethernet_mac; ++ serial0 = &rs232_uart_1; ++ } ; ++ chosen { ++ bootargs = ""; ++ stdout-path = "serial0:115200"; + } ; ++ cpus { ++ #address-cells = <1>; ++ #cpus = <0x1>; ++ #size-cells = <0>; ++ microblaze_0: cpu@0 { ++ bus-handle = <&axi_mm_mb>, <&axi4_0>, <&axi4lite_0>; ++ clock-frequency = <150000000>; ++ clocks = <&clk_cpu>; ++ compatible = "xlnx,microblaze-8.50.a"; ++ d-cache-baseaddr = <0x80000000>; ++ d-cache-highaddr = <0xffffffff>; ++ d-cache-line-size = <0x20>; ++ d-cache-size = <0x2000>; ++ device_type = "cpu"; ++ i-cache-baseaddr = <0x80000000>; ++ i-cache-highaddr = <0xffffffff>; ++ i-cache-line-size = <0x20>; ++ i-cache-size = <0x2000>; ++ model = "microblaze,8.50.a"; ++ reg = <0>; ++ timebase-frequency = <150000000>; ++ xlnx,addr-tag-bits = <0x12>; ++ xlnx,allow-dcache-wr = <0x1>; ++ xlnx,allow-icache-wr = <0x1>; ++ xlnx,area-optimized = <0x0>; ++ xlnx,avoid-primitives = <0x0>; ++ xlnx,base-vectors = <0x0>; ++ xlnx,branch-target-cache-size = <0x0>; ++ xlnx,cache-byte-size = <0x2000>; ++ xlnx,d-axi = <0x1>; ++ xlnx,d-lmb = <0x1>; ++ xlnx,d-plb = <0x0>; ++ xlnx,data-size = <0x20>; ++ xlnx,dcache-addr-tag = <0x12>; ++ xlnx,dcache-always-used = <0x1>; ++ xlnx,dcache-byte-size = <0x2000>; ++ xlnx,dcache-data-width = <0x0>; ++ xlnx,dcache-force-tag-lutram = <0x1>; ++ xlnx,dcache-interface = <0x0>; ++ xlnx,dcache-line-len = <0x8>; ++ xlnx,dcache-use-fsl = <0x0>; ++ xlnx,dcache-use-writeback = <0x0>; ++ xlnx,dcache-victims = <0x0>; ++ xlnx,debug-enabled = <0x1>; ++ xlnx,div-zero-exception = <0x0>; ++ xlnx,dynamic-bus-sizing = <0x1>; ++ xlnx,ecc-use-ce-exception = <0x0>; ++ xlnx,edge-is-positive = <0x1>; ++ xlnx,endianness = <0x1>; ++ xlnx,family = "kintex7"; ++ xlnx,fault-tolerant = <0x0>; ++ xlnx,fpu-exception = <0x0>; ++ xlnx,freq = <0x8f0d180>; ++ xlnx,fsl-data-size = <0x20>; ++ xlnx,fsl-exception = <0x0>; ++ xlnx,fsl-links = <0x0>; ++ xlnx,i-axi = <0x0>; ++ xlnx,i-lmb = <0x1>; ++ xlnx,i-plb = <0x0>; ++ xlnx,icache-always-used = <0x1>; ++ xlnx,icache-data-width = <0x0>; ++ xlnx,icache-force-tag-lutram = <0x1>; ++ xlnx,icache-interface = <0x0>; ++ xlnx,icache-line-len = <0x8>; ++ xlnx,icache-streams = <0x0>; ++ xlnx,icache-use-fsl = <0x0>; ++ xlnx,icache-victims = <0x0>; ++ xlnx,ill-opcode-exception = <0x1>; ++ xlnx,instance = "microblaze_0"; ++ xlnx,interconnect = <0x2>; ++ xlnx,interrupt-is-edge = <0x0>; ++ xlnx,lockstep-slave = <0x0>; ++ xlnx,mmu-dtlb-size = <0x2>; ++ xlnx,mmu-itlb-size = <0x2>; ++ xlnx,mmu-privileged-instr = <0x0>; ++ xlnx,mmu-tlb-access = <0x3>; ++ xlnx,mmu-zones = <0x2>; ++ xlnx,number-of-pc-brk = <0x1>; ++ xlnx,number-of-rd-addr-brk = <0x0>; ++ xlnx,number-of-wr-addr-brk = <0x0>; ++ xlnx,opcode-0x0-illegal = <0x1>; ++ xlnx,optimization = <0x0>; ++ xlnx,pc-width = <0x20>; ++ xlnx,pvr = <0x2>; ++ xlnx,pvr-user1 = <0x0>; ++ xlnx,pvr-user2 = <0x0>; ++ xlnx,reset-msr = <0x0>; ++ xlnx,sco = <0x0>; ++ xlnx,stream-interconnect = <0x0>; ++ xlnx,unaligned-exceptions = <0x1>; ++ xlnx,use-barrel = <0x1>; ++ xlnx,use-branch-target-cache = <0x0>; ++ xlnx,use-dcache = <0x1>; ++ xlnx,use-div = <0x0>; ++ xlnx,use-ext-brk = <0x1>; ++ xlnx,use-ext-nm-brk = <0x1>; ++ xlnx,use-extended-fsl-instr = <0x0>; ++ xlnx,use-fpu = <0x0>; ++ xlnx,use-hw-mul = <0x1>; ++ xlnx,use-icache = <0x1>; ++ xlnx,use-interrupt = <0x1>; ++ xlnx,use-mmu = <0x3>; ++ xlnx,use-msr-instr = <0x1>; ++ xlnx,use-pcmp-instr = <0x1>; ++ xlnx,use-reorder-instr = <0x1>; ++ xlnx,use-stack-protection = <0x0>; ++ } ; ++ } ; ++ clocks { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ clk_bus: bus { ++ #clock-cells = <0>; ++ clock-frequency = <100000000>; ++ clock-output-names = "bus"; ++ compatible = "fixed-clock"; ++ reg = <1>; ++ } ; ++ clk_cpu: cpu { ++ #clock-cells = <0>; ++ clock-frequency = <150000000>; ++ clock-output-names = "cpu"; ++ compatible = "fixed-clock"; ++ reg = <0>; ++ } ; ++ } ; ++ axi4lite_0: axi@2 { ++ #address-cells = <1>; ++ #size-cells = <1>; ++ compatible = "xlnx,axi-interconnect-1.06.a", "simple-bus"; ++ ranges ; ++ axi_dma_ethernet: axi-dma@50000000 { ++ axistream-connected = <&soft_ethernet_mac>; ++ axistream-control-connected = <&soft_ethernet_mac>; ++ compatible = "xlnx,axi-dma-6.03.a", "xlnx,axi-dma-1.00.a"; ++ interrupt-parent = <&interrupt_cntlr>; ++ interrupts = < 0 2 1 2 >; ++ reg = < 0x50000000 0x10000 >; ++ xlnx,dlytmr-resolution = <0x4e2>; ++ xlnx,enable-multi-channel = <0x0>; ++ xlnx,family = "kintex7"; ++ xlnx,generic = <0x0>; ++ xlnx,include-mm2s = <0x1>; ++ xlnx,include-mm2s-dre = <0x1>; ++ xlnx,include-mm2s-sf = <0x1>; ++ xlnx,include-s2mm = <0x1>; ++ xlnx,include-s2mm-dre = <0x1>; ++ xlnx,include-s2mm-sf = <0x1>; ++ xlnx,include-sg = <0x1>; ++ xlnx,instance = "AXI_DMA_Ethernet"; ++ xlnx,mm2s-burst-size = <0x10>; ++ xlnx,num-mm2s-channels = <0x1>; ++ xlnx,num-s2mm-channels = <0x1>; ++ xlnx,prmry-is-aclk-async = <0x1>; ++ xlnx,s2mm-burst-size = <0x10>; ++ xlnx,sg-include-desc-queue = <0x1>; ++ xlnx,sg-include-stscntrl-strm = <0x1>; ++ xlnx,sg-length-width = <0x10>; ++ xlnx,sg-use-stsapp-length = <0x1>; ++ } ; ++ axi_xadc_0: axi-xadc@40d00000 { ++ clocks = <&clk_bus>; ++ compatible = "xlnx,axi-xadc-1.00.a"; ++ interrupt-parent = <&interrupt_cntlr>; ++ interrupts = < 7 2 >; ++ reg = < 0x40d00000 0x10000 >; ++ xlnx,family = "kintex7"; ++ xlnx,has-temp-bus = <0x1>; ++ xlnx,include-intr = <0x1>; ++ xlnx,instance = "axi_xadc_0"; ++ xlnx,sim-monitor-file = "Sysmon_Design.txt"; ++ } ; ++ debug_module: serial@40200000 { ++ compatible = "xlnx,mdm-2.10.a", "xlnx,xps-uartlite-1.00.a"; ++ reg = < 0x40200000 0x10000 >; ++ xlnx,family = "kintex7"; ++ xlnx,interconnect = <0x2>; ++ xlnx,jtag-chain = <0x2>; ++ xlnx,mb-dbg-ports = <0x1>; ++ xlnx,use-bscan = <0x0>; ++ xlnx,use-uart = <0x1>; ++ } ; ++ dip_switches_4bits: gpio@40700000 { ++ #gpio-cells = <2>; ++ compatible = "xlnx,axi-gpio-1.01.b", "xlnx,xps-gpio-1.00.a"; ++ gpio-controller ; ++ reg = < 0x40700000 0x10000 >; ++ xlnx,all-inputs = <0x1>; ++ xlnx,all-inputs-2 = <0x0>; ++ xlnx,dout-default = <0x0>; ++ xlnx,dout-default-2 = <0x0>; ++ xlnx,family = "kintex7"; ++ xlnx,gpio-width = <0x4>; ++ xlnx,gpio2-width = <0x20>; ++ xlnx,instance = "DIP_Switches_4Bits"; ++ xlnx,interrupt-present = <0x1>; ++ xlnx,is-dual = <0x0>; ++ xlnx,tri-default = <0xffffffff>; ++ xlnx,tri-default-2 = <0xffffffff>; ++ } ; ++ dual_timer_counter: system-timer@40300000 { ++ clock-frequency = <100000000>; ++ clocks = <&clk_bus>; ++ compatible = "xlnx,axi-timer-1.03.a", "xlnx,xps-timer-1.00.a"; ++ interrupt-parent = <&interrupt_cntlr>; ++ interrupts = < 3 2 >; ++ reg = < 0x40300000 0x10000 >; ++ xlnx,count-width = <0x20>; ++ xlnx,family = "kintex7"; ++ xlnx,gen0-assert = <0x1>; ++ xlnx,gen1-assert = <0x1>; ++ xlnx,instance = "Dual_Timer_Counter"; ++ xlnx,one-timer-only = <0x0>; ++ xlnx,trig0-assert = <0x1>; ++ xlnx,trig1-assert = <0x1>; ++ } ; ++ iic_eeprom: i2c@40a00000 { ++ compatible = "xlnx,axi-iic-1.02.a", "xlnx,xps-iic-2.00.a"; ++ interrupt-parent = <&interrupt_cntlr>; ++ interrupts = < 4 2 >; ++ reg = < 0x40a00000 0x10000 >; ++ xlnx,family = "kintex7"; ++ xlnx,gpo-width = <0x1>; ++ xlnx,iic-freq = <0x186a0>; ++ xlnx,instance = "IIC_EEPROM"; ++ xlnx,scl-inertial-delay = <0x0>; ++ xlnx,sda-inertial-delay = <0x0>; ++ xlnx,sda-level = <0x1>; ++ xlnx,ten-bit-adr = <0x0>; ++ } ; ++ interrupt_cntlr: interrupt-controller@40100000 { ++ #interrupt-cells = <0x2>; ++ compatible = "xlnx,axi-intc-1.03.a", "xlnx,xps-intc-1.00.a"; ++ interrupt-controller ; ++ reg = < 0x40100000 0x10000 >; ++ xlnx,kind-of-intr = <0x0>; ++ xlnx,num-intr-inputs = <0x8>; ++ } ; ++ lcd_gpio: gpio@40800000 { ++ #gpio-cells = <2>; ++ compatible = "xlnx,axi-gpio-1.01.b", "xlnx,xps-gpio-1.00.a"; ++ gpio-controller ; ++ reg = < 0x40800000 0x10000 >; ++ xlnx,all-inputs = <0x0>; ++ xlnx,all-inputs-2 = <0x0>; ++ xlnx,dout-default = <0x0>; ++ xlnx,dout-default-2 = <0x0>; ++ xlnx,family = "kintex7"; ++ xlnx,gpio-width = <0x7>; ++ xlnx,gpio2-width = <0x20>; ++ xlnx,instance = "LCD_GPIO"; ++ xlnx,interrupt-present = <0x0>; ++ xlnx,is-dual = <0x0>; ++ xlnx,tri-default = <0xffffffff>; ++ xlnx,tri-default-2 = <0xffffffff>; ++ } ; ++ leds_8bits: gpio@40600000 { ++ #gpio-cells = <2>; ++ compatible = "xlnx,axi-gpio-1.01.b", "xlnx,xps-gpio-1.00.a"; ++ gpio-controller ; ++ reg = < 0x40600000 0x10000 >; ++ xlnx,all-inputs = <0x0>; ++ xlnx,all-inputs-2 = <0x0>; ++ xlnx,dout-default = <0x0>; ++ xlnx,dout-default-2 = <0x0>; ++ xlnx,family = "kintex7"; ++ xlnx,gpio-width = <0x8>; ++ xlnx,gpio2-width = <0x20>; ++ xlnx,instance = "LEDs_8Bits"; ++ xlnx,interrupt-present = <0x1>; ++ xlnx,is-dual = <0x0>; ++ xlnx,tri-default = <0xffffffff>; ++ xlnx,tri-default-2 = <0xffffffff>; ++ } ; ++ logisdhc_0: logisdhc@40b00000 { ++ compatible = "xlnx,logisdhc-1.06.c"; ++ interrupt-parent = <&interrupt_cntlr>; ++ interrupts = < 6 2 >; ++ reg = < 0x40b00000 0x10000 >; ++ xlnx,byte-per-pixel = <0x4>; ++ xlnx,convert-endianess = <0x0>; ++ xlnx,dma-type = <0x1>; ++ xlnx,family = "kintex7"; ++ xlnx,ip-license-type = <0x1>; ++ xlnx,ip-major-revision = <0x1>; ++ xlnx,ip-minor-revision = <0x6>; ++ xlnx,ip-patch-level = <0x2>; ++ xlnx,mem-burst = <0x4>; ++ xlnx,mem-data-bus-width = <0x20>; ++ xlnx,mem-interface = <0x1>; ++ xlnx,regs-interface = <0x2>; ++ xlnx,row-stride = <0x400>; ++ xlnx,sd-base-clock-freq = <0x64>; ++ xlnx,use-dma = <0x0>; ++ } ; ++ primary_flash: flash@48000000 { ++ #address-cells = <1>; ++ #size-cells = <1>; ++ bank-width = <2>; ++ compatible = "xlnx,axi-emc-1.03.b", "cfi-flash"; ++ reg = < 0x48000000 0x8000000 >; ++ xlnx,axi-clk-period-ps = <0x2710>; ++ xlnx,family = "kintex7"; ++ xlnx,include-datawidth-matching-0 = <0x1>; ++ xlnx,include-datawidth-matching-1 = <0x0>; ++ xlnx,include-datawidth-matching-2 = <0x0>; ++ xlnx,include-datawidth-matching-3 = <0x0>; ++ xlnx,include-negedge-ioregs = <0x0>; ++ xlnx,instance = "Linear_Flash"; ++ xlnx,lflash-period-ps = <0x4e20>; ++ xlnx,linear-flash-sync-burst = <0x0>; ++ xlnx,max-mem-width = <0x10>; ++ xlnx,mem0-type = <0x2>; ++ xlnx,mem0-width = <0x10>; ++ xlnx,mem1-type = <0x0>; ++ xlnx,mem1-width = <0x20>; ++ xlnx,mem2-type = <0x0>; ++ xlnx,mem2-width = <0x20>; ++ xlnx,mem3-type = <0x0>; ++ xlnx,mem3-width = <0x20>; ++ xlnx,num-banks-mem = <0x1>; ++ xlnx,parity-type-mem-0 = <0x0>; ++ xlnx,parity-type-mem-1 = <0x0>; ++ xlnx,parity-type-mem-2 = <0x0>; ++ xlnx,parity-type-mem-3 = <0x0>; ++ xlnx,s-axi-en-reg = <0x0>; ++ xlnx,s-axi-mem-addr-width = <0x20>; ++ xlnx,s-axi-mem-data-width = <0x20>; ++ xlnx,s-axi-mem-id-width = <0x1>; ++ xlnx,s-axi-mem-protocol = "AXI4LITE"; ++ xlnx,s-axi-reg-addr-width = <0x5>; ++ xlnx,s-axi-reg-data-width = <0x20>; ++ xlnx,s-axi-reg-protocol = "axi4"; ++ xlnx,synch-pipedelay-0 = <0x2>; ++ xlnx,synch-pipedelay-1 = <0x2>; ++ xlnx,synch-pipedelay-2 = <0x2>; ++ xlnx,synch-pipedelay-3 = <0x2>; ++ xlnx,tavdv-ps-mem-0 = <0x1fbd0>; ++ xlnx,tavdv-ps-mem-1 = <0x3a98>; ++ xlnx,tavdv-ps-mem-2 = <0x3a98>; ++ xlnx,tavdv-ps-mem-3 = <0x3a98>; ++ xlnx,tcedv-ps-mem-0 = <0x1fbd0>; ++ xlnx,tcedv-ps-mem-1 = <0x3a98>; ++ xlnx,tcedv-ps-mem-2 = <0x3a98>; ++ xlnx,tcedv-ps-mem-3 = <0x3a98>; ++ xlnx,thzce-ps-mem-0 = <0x88b8>; ++ xlnx,thzce-ps-mem-1 = <0x1b58>; ++ xlnx,thzce-ps-mem-2 = <0x1b58>; ++ xlnx,thzce-ps-mem-3 = <0x1b58>; ++ xlnx,thzoe-ps-mem-0 = <0x1b58>; ++ xlnx,thzoe-ps-mem-1 = <0x1b58>; ++ xlnx,thzoe-ps-mem-2 = <0x1b58>; ++ xlnx,thzoe-ps-mem-3 = <0x1b58>; ++ xlnx,tlzwe-ps-mem-0 = <0x88b8>; ++ xlnx,tlzwe-ps-mem-1 = <0x0>; ++ xlnx,tlzwe-ps-mem-2 = <0x0>; ++ xlnx,tlzwe-ps-mem-3 = <0x0>; ++ xlnx,tpacc-ps-flash-0 = <0x61a8>; ++ xlnx,tpacc-ps-flash-1 = <0x61a8>; ++ xlnx,tpacc-ps-flash-2 = <0x61a8>; ++ xlnx,tpacc-ps-flash-3 = <0x61a8>; ++ xlnx,twc-ps-mem-0 = <0x11170>; ++ xlnx,twc-ps-mem-1 = <0x3a98>; ++ xlnx,twc-ps-mem-2 = <0x3a98>; ++ xlnx,twc-ps-mem-3 = <0x3a98>; ++ xlnx,twp-ps-mem-0 = <0x11170>; ++ xlnx,twp-ps-mem-1 = <0x2ee0>; ++ xlnx,twp-ps-mem-2 = <0x2ee0>; ++ xlnx,twp-ps-mem-3 = <0x2ee0>; ++ xlnx,twph-ps-mem-0 = <0x2ee0>; ++ xlnx,twph-ps-mem-1 = <0x2ee0>; ++ xlnx,twph-ps-mem-2 = <0x2ee0>; ++ xlnx,twph-ps-mem-3 = <0x2ee0>; ++ xlnx,wr-rec-time-mem-0 = <0x186a0>; ++ xlnx,wr-rec-time-mem-1 = <0x186a0>; ++ xlnx,wr-rec-time-mem-2 = <0x186a0>; ++ xlnx,wr-rec-time-mem-3 = <0x186a0>; ++ partition@0x00000000 { ++ label = "fpga"; ++ reg = <0x00000000 0x00200000>; ++ }; ++ partition@0x00200000 { ++ label = "boot"; ++ reg = <0x00200000 0x00040000>; ++ }; ++ partition@0x00240000 { ++ label = "bootenv"; ++ reg = <0x00240000 0x00020000>; ++ }; ++ partition@0x00260000 { ++ label = "image"; ++ reg = <0x00260000 0x00c00000>; ++ }; ++ partition@0x00e60000 { ++ label = "spare"; ++ reg = <0x00e60000 0x00000000>; ++ }; ++ } ; ++ push_buttons_5bits: gpio@40500000 { ++ #gpio-cells = <2>; ++ compatible = "xlnx,axi-gpio-1.01.b", "xlnx,xps-gpio-1.00.a"; ++ gpio-controller ; ++ reg = < 0x40500000 0x10000 >; ++ xlnx,all-inputs = <0x1>; ++ xlnx,all-inputs-2 = <0x0>; ++ xlnx,dout-default = <0x0>; ++ xlnx,dout-default-2 = <0x0>; ++ xlnx,family = "kintex7"; ++ xlnx,gpio-width = <0x5>; ++ xlnx,gpio2-width = <0x20>; ++ xlnx,instance = "Push_Buttons_5Bits"; ++ xlnx,interrupt-present = <0x1>; ++ xlnx,is-dual = <0x0>; ++ xlnx,tri-default = <0xffffffff>; ++ xlnx,tri-default-2 = <0xffffffff>; ++ } ; ++ rotary_gpio: gpio@40900000 { ++ #gpio-cells = <2>; ++ compatible = "xlnx,axi-gpio-1.01.b", "xlnx,xps-gpio-1.00.a"; ++ gpio-controller ; ++ reg = < 0x40900000 0x10000 >; ++ xlnx,all-inputs = <0x1>; ++ xlnx,all-inputs-2 = <0x0>; ++ xlnx,dout-default = <0x0>; ++ xlnx,dout-default-2 = <0x0>; ++ xlnx,family = "kintex7"; ++ xlnx,gpio-width = <0x3>; ++ xlnx,gpio2-width = <0x20>; ++ xlnx,instance = "ROTARY_GPIO"; ++ xlnx,interrupt-present = <0x0>; ++ xlnx,is-dual = <0x0>; ++ xlnx,tri-default = <0xffffffff>; ++ xlnx,tri-default-2 = <0xffffffff>; ++ } ; ++ rs232_uart_1: serial@40400000 { ++ clock-frequency = <100000000>; ++ clocks = <&clk_bus>; ++ compatible = "xlnx,axi-uart16550-1.01.a", "xlnx,xps-uart16550-2.00.a", "ns16550a"; ++ current-speed = <115200>; ++ device_type = "serial"; ++ interrupt-parent = <&interrupt_cntlr>; ++ interrupts = < 5 2 >; ++ reg = < 0x40400000 0x10000 >; ++ reg-offset = <0x1000>; ++ reg-shift = <2>; ++ xlnx,external-xin-clk-hz = <0x17d7840>; ++ xlnx,family = "kintex7"; ++ xlnx,has-external-rclk = <0x0>; ++ xlnx,has-external-xin = <0x0>; ++ xlnx,instance = "RS232_Uart_1"; ++ xlnx,is-a-16550 = <0x1>; ++ xlnx,use-modem-ports = <0x0>; ++ xlnx,use-user-ports = <0x0>; ++ } ; ++ soft_ethernet_mac: axi-ethernet@50100000 { ++ axistream-connected = <&axi_dma_ethernet>; ++ axistream-control-connected = <&axi_dma_ethernet>; ++ clock-frequency = <100000000>; ++ clocks = <&clk_bus>; ++ compatible = "xlnx,axi-ethernet-3.01.a", "xlnx,axi-ethernet-1.00.a"; ++ device_type = "network"; ++ interrupt-parent = <&interrupt_cntlr>; ++ interrupts = < 2 2 >; ++ local-mac-address = [ 00 0a 35 00 d9 4e ]; ++ phy-mode = "gmii"; ++ phy-handle = <&phy0>; ++ reg = < 0x50100000 0x40000 >; ++ xlnx,avb = <0x0>; ++ xlnx,halfdup = <0x0>; ++ xlnx,include-io = <0x1>; ++ xlnx,mcast-extend = <0x0>; ++ xlnx,phy-type = <0x1>; ++ xlnx,phyaddr = <0x1>; ++ xlnx,rxcsum = <0x0>; ++ xlnx,rxmem = <0x1000>; ++ xlnx,rxvlan-strp = <0x0>; ++ xlnx,rxvlan-tag = <0x0>; ++ xlnx,rxvlan-tran = <0x0>; ++ xlnx,stats = <0x0>; ++ xlnx,txcsum = <0x0>; ++ xlnx,txmem = <0x1000>; ++ xlnx,txvlan-strp = <0x0>; ++ xlnx,txvlan-tag = <0x0>; ++ xlnx,txvlan-tran = <0x0>; ++ xlnx,type = <0x1>; ++ mdio { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ phy0: phy@7 { ++ compatible = "marvell,88e1111"; ++ device_type = "ethernet-phy"; ++ reg = <7>; ++ } ; ++ } ; ++ } ; ++ } ; ++ axi_mm_mb: axi@1 { ++ #address-cells = <1>; ++ #size-cells = <1>; ++ compatible = "xlnx,axi-interconnect-1.06.a", "simple-bus"; ++ ranges ; ++ axi4_0: axi@0 { ++ #address-cells = <1>; ++ #size-cells = <1>; ++ compatible = "xlnx,axi-interconnect-1.06.a", "simple-bus"; ++ ranges = < 0x80000000 0x80000000 0x40000000 >; ++ } ; + } ; } ; diff --git a/board/xilinx/microblaze-generic/config.mk b/board/xilinx/microblaze-generic/config.mk index 36bdd96..25e97de 100644 @@ -63,115 +582,58 @@ index 36bdd96..25e97de 100644 +PLATFORM_CCPFLAGS += -mxl-pattern-compare +PLATFORM_CCPFLAGS += -mxl-reorder diff --git a/board/xilinx/microblaze-generic/xparameters.h b/board/xilinx/microblaze-generic/xparameters.h -index d6d0d67..f539044 100644 +index dc5645b..80b1ce3 100644 --- a/board/xilinx/microblaze-generic/xparameters.h +++ b/board/xilinx/microblaze-generic/xparameters.h -@@ -1,67 +1,47 @@ --/* -- * (C) Copyright 2007 Michal Simek -- * -- * Michal SIMEK <[email protected]> -- * -- * SPDX-License-Identifier: GPL-2.0+ -- * -- * CAUTION: This file is a faked configuration !!! -- * There is no real target for the microblaze-generic -- * configuration. You have to replace this file with -- * the generated file from your Xilinx design flow. -- */ -- --#define XILINX_BOARD_NAME microblaze-generic -- --/* System Clock Frequency */ --#define XILINX_CLOCK_FREQ 100000000 -- +@@ -15,15 +15,11 @@ + /* Microblaze is microblaze_0 */ #define XILINX_USE_MSR_INSTR 1 -#define XILINX_FSL_NUMBER 3 -+#define XILINX_PVR 2 +- +-/* GPIO is LEDs_4Bit*/ +-#define XILINX_GPIO_BASEADDR 0x40000000 +#define XILINX_FSL_NUMBER 0 +#define XILINX_USE_ICACHE 1 +#define XILINX_USE_DCACHE 1 +#define XILINX_DCACHE_BYTE_SIZE 8192 --/* Interrupt controller is opb_intc_0 */ --#define XILINX_INTC_BASEADDR 0x41200000 --#define XILINX_INTC_NUM_INTR_INPUTS 6 -+/* Interrupt controller is interrupt_cntlr */ -+#define XILINX_INTC_BASEADDR 0x40100000 -+#define XILINX_INTC_NUM_INTR_INPUTS 8 - --/* Timer pheriphery is opb_timer_1 */ --#define XILINX_TIMER_BASEADDR 0x41c00000 --#define XILINX_TIMER_IRQ 0 -+/* Timer pheriphery is dual_timer_counter */ -+#define XILINX_TIMER_BASEADDR 0x40300000 -+#define XILINX_TIMER_IRQ 3 - --/* Uart pheriphery is RS232_Uart */ --#define XILINX_UARTLITE_BASEADDR 0x40600000 --#define XILINX_UARTLITE_BAUDRATE 115200 -+/* System Timer Clock Frequency */ -+#define XILINX_CLOCK_FREQ 100000000 -+ -+/* Uart console is rs232_uart_1 */ -+#define XILINX_UART16550 -+#define XILINX_UART16550_BASEADDR 0x40400000 -+#define XILINX_UART16550_CLOCK_HZ 100000000 -+#define CONFIG_CONS_INDEX 1 - --/* IIC pheriphery is IIC_EEPROM */ --#define XILINX_IIC_0_BASEADDR 0x40800000 -+/* IIC pheriphery is iic_eeprom */ -+#define XILINX_IIC_0_BASEADDR 0x40a00000 - #define XILINX_IIC_0_FREQ 100000 - #define XILINX_IIC_0_BIT 0 - --/* GPIO is LEDs_4Bit*/ --#define XILINX_GPIO_BASEADDR 0x40000000 -- --/* Flash Memory is FLASH_2Mx32 */ + /* Flash Memory is FLASH_2Mx32 */ -#define XILINX_FLASH_START 0x2c000000 -#define XILINX_FLASH_SIZE 0x00800000 -+/* GPIO doesn't exist */ - --/* Main Memory is DDR_SDRAM_64Mx32 */ --#define XILINX_RAM_START 0x28000000 --#define XILINX_RAM_SIZE 0x04000000 -+/* SDIO doesn't exist */ - --/* Sysace Controller is SysACE_CompactFlash */ --#define XILINX_SYSACE_BASEADDR 0x41800000 --#define XILINX_SYSACE_HIGHADDR 0x4180ffff --#define XILINX_SYSACE_MEM_WIDTH 16 -+/* Main Memory is ddr3_sdram */ -+#define XILINX_RAM_START 0x80000000 -+#define XILINX_RAM_SIZE 0x40000000 - --/* Ethernet controller is Ethernet_MAC */ --#define XILINX_EMACLITE_BASEADDR 0x40C00000 -+/* Flash Memory is linear_flash */ -+#define XILINX_FLASH_START 0x48000000 -+#define XILINX_FLASH_SIZE 0x08000000 - --/* LL_TEMAC Ethernet controller */ --#define XILINX_LLTEMAC_BASEADDR 0x44000000 --#define XILINX_LLTEMAC_SDMA_CTRL_BASEADDR 0x42000180 --#define XILINX_LLTEMAC_BASEADDR1 0x44200000 --#define XILINX_LLTEMAC_FIFO_BASEADDR1 0x42100000 -+/* Sysace doesn't exist */ - +- -/* Watchdog IP is wxi_timebase_wdt_0 */ -#define XILINX_WATCHDOG_BASEADDR 0x50000000 -#define XILINX_WATCHDOG_IRQ 1 -+/* Ethernet controller is soft_ethernet_mac */ -+#define XILINX_AXIEMAC_BASEADDR 0x50100000 -+#define XILINX_AXIDMA_BASEADDR 0x50000000 ++#define XILINX_FLASH_START 0x48000000 ++#define XILINX_FLASH_SIZE 0x08000000 +diff --git a/configs/microblaze-generic_defconfig b/configs/microblaze-generic_defconfig +index 21a7261..5f17daf 100644 +--- a/configs/microblaze-generic_defconfig ++++ b/configs/microblaze-generic_defconfig +@@ -7,8 +7,8 @@ CONFIG_SPL=y + CONFIG_FIT=y + CONFIG_FIT_VERBOSE=y + CONFIG_HUSH_PARSER=y +-CONFIG_SYS_PROMPT="U-Boot-mONStR> " +-CONFIG_CMD_GPIO=y ++CONFIG_SYS_PROMPT="U-Boot> " ++# CONFIG_CMD_GPIO is not set + # CONFIG_CMD_SETEXPR is not set + CONFIG_CMD_TFTPPUT=y + CONFIG_CMD_DHCP=y +@@ -19,5 +19,6 @@ CONFIG_NETCONSOLE=y + CONFIG_DM_ETH=y + CONFIG_XILINX_AXIEMAC=y + CONFIG_XILINX_EMACLITE=y ++CONFIG_NET_RANDOM_ETHADDR=y + CONFIG_SYS_NS16550=y + CONFIG_XILINX_UARTLITE=y diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h -index e16965c..f463b83 100644 +index b424782..eb56f12 100644 --- a/include/configs/microblaze-generic.h +++ b/include/configs/microblaze-generic.h -@@ -151,7 +151,7 @@ +@@ -91,7 +91,7 @@ /* max number of memory banks */ # define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of sectors on one chip */ @@ -180,36 +642,15 @@ index e16965c..f463b83 100644 /* hardware flash protection */ # define CONFIG_SYS_FLASH_PROTECTION /* use buffered writes (20x faster) */ -@@ -247,7 +247,9 @@ - #define CONFIG_CMD_ASKENV - #define CONFIG_CMD_IRQ - #define CONFIG_CMD_MFSL --#define CONFIG_CMD_GPIO -+#ifdef CONFIG_XILINX_GPIO -+# define CONFIG_CMD_GPIO -+#endif - - #if defined(CONFIG_DCACHE) || defined(CONFIG_ICACHE) - # define CONFIG_CMD_CACHE -@@ -317,7 +319,7 @@ +@@ -161,6 +161,8 @@ + #define XILINX_DCACHE_BYTE_SIZE 32768 #endif - /* Miscellaneous configurable options */ --#define CONFIG_SYS_PROMPT "U-Boot-mONStR> " -+#define CONFIG_SYS_PROMPT "U-Boot> " - /* size of console buffer */ - #define CONFIG_SYS_CBSIZE 512 - /* print buffer size */ -@@ -350,7 +352,8 @@ - "nc=setenv stdout nc;"\ - "setenv stdin nc\0" \ - "serial=setenv stdout serial;"\ -- "setenv stdin serial\0" -+ "setenv stdin serial\0" \ -+ "ethaddr=00:0a:35:00:01:22\0" - - #define CONFIG_CMDLINE_EDITING - ++#define CONFIG_SYS_BOOTM_LEN (60 * 1024 * 1024) ++ + /* + * BOOTP options + */ -- -2.6.4 +2.7.0 diff --git a/recipes-bsp/u-boot/u-boot-xlnx_2015.07.bb b/recipes-bsp/u-boot/u-boot-xlnx_2015.07.bb deleted file mode 100644 index 25d50eb..0000000 --- a/recipes-bsp/u-boot/u-boot-xlnx_2015.07.bb +++ /dev/null @@ -1,31 +0,0 @@ -include u-boot-xlnx.inc -include u-boot-spl-zynq-init.inc - -# this matches u-boot-xlnx 'xilinx-v2015.4' release tag -SRCREV = "4942ae4d03ee4ef4b2dd750d441f730150ee9288" -PV = "v2015.07${XILINX_EXTENSION}+git${SRCPV}" - -FILESEXTRAPATHS_prepend := "${THISDIR}/u-boot-xlnx:" -SRC_URI += " \ - file://0001-microblaze-Fix-style-issues-in-header-files.patch \ - file://0002-microblaze-Fix-C99-gnu99-compatiblity-for-inline-fun.patch \ - " - -SRC_URI_append_kc705-trd-microblazeel = " file://microblaze-kc705-trd-Convert-microblaze-generic-to-k.patch" - -LIC_FILES_CHKSUM = "file://README;beginline=1;endline=6;md5=157ab8408beab40cd8ce1dc69f702a6c" - -UBOOT_ENV_zc702-zynq7 = "uEnv" -UBOOT_ENV_zedboard-zynq7 = "uEnv" - -SRC_URI_append_zc702-zynq7 = " file://uEnv.txt" -SRC_URI_append_zedboard-zynq7 = " file://uEnv.txt" - -# u-boot 2015.07 has support for these -HAS_PS7INIT ?= " \ - zynq_microzed_config \ - zynq_zed_config \ - zynq_zc702_config \ - zynq_zc706_config \ - " - diff --git a/recipes-bsp/u-boot/u-boot-xlnx_2016.01.bb b/recipes-bsp/u-boot/u-boot-xlnx_2016.01.bb new file mode 100644 index 0000000..67c73da --- /dev/null +++ b/recipes-bsp/u-boot/u-boot-xlnx_2016.01.bb @@ -0,0 +1,28 @@ +include u-boot-xlnx.inc +include u-boot-spl-zynq-init.inc + +# this matches u-boot-xlnx 'xilinx-v2016.?' release tag +SRCREV = "68b454fbd9f7ce10e87e736888ea54c1655ce025" +PV = "v2016.01${XILINX_EXTENSION}+git${SRCPV}" + +FILESEXTRAPATHS_prepend := "${THISDIR}/u-boot-xlnx:" + +SRC_URI_append_kc705-trd-microblazeel = " file://microblaze-kc705-trd-Convert-microblaze-generic-to-k.patch" + +LIC_FILES_CHKSUM = "file://README;beginline=1;endline=6;md5=157ab8408beab40cd8ce1dc69f702a6c" + +UBOOT_ENV_zc702-zynq7 = "uEnv" +UBOOT_ENV_zedboard-zynq7 = "uEnv" + +SRC_URI_append_zc702-zynq7 = " file://uEnv.txt" +SRC_URI_append_zedboard-zynq7 = " file://uEnv.txt" + +# u-boot 2016.01 has support for these +HAS_PS7INIT ?= " \ + zynq_microzed_config \ + zynq_zed_config \ + zynq_zc702_config \ + zynq_zc706_config \ + zynq_zybo_config \ + " + -- 2.7.0 -- _______________________________________________ meta-xilinx mailing list [email protected] https://lists.yoctoproject.org/listinfo/meta-xilinx
