Hi, How to use xilinx-spi with a Xilinx SPI IP supporting 16 bit transmission ?
In current implementation I observe transmissions errors (SPI mirror implemented in FPGA fabric) as only part of the 16 bit word is being sent. Regards, Adrian -- _______________________________________________ meta-xilinx mailing list [email protected] https://lists.yoctoproject.org/listinfo/meta-xilinx
