Replace the existing device tree content with the content of the zynq-microzed.dts from the kernel source. Specifically based on commit df2f3c48b9cd51e2612a1598342769d09d849f39.
This resolves the issues with the ethernet phy as well as adding pinctrl for USB. Signed-off-by: Nathan Rossi <[email protected]> --- .../device-tree/files/microzed/microzed-zynq7.dts | 82 +++++++++++----------- 1 file changed, 41 insertions(+), 41 deletions(-) diff --git a/recipes-bsp/device-tree/files/microzed/microzed-zynq7.dts b/recipes-bsp/device-tree/files/microzed/microzed-zynq7.dts index f0de60ee35..b9376a4904 100644 --- a/recipes-bsp/device-tree/files/microzed/microzed-zynq7.dts +++ b/recipes-bsp/device-tree/files/microzed/microzed-zynq7.dts @@ -1,10 +1,22 @@ +/* + * Copyright (C) 2011 - 2014 Xilinx + * Copyright (C) 2016 Jagan Teki <[email protected]> + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ /dts-v1/; /include/ "zynq-7000.dtsi" -/include/ "zynq-7000-qspi-dummy.dtsi" / { - model = "Avnet microZed"; - compatible = "avnet,microzed", "xlnx,zynq-7000"; + model = "Zynq MicroZED Development Board"; + compatible = "xlnx,zynq-microzed", "xlnx,zynq-7000"; aliases { ethernet0 = &gem0; @@ -17,25 +29,26 @@ }; chosen { - bootargs = "earlyprintk"; + bootargs = "earlycon"; stdout-path = "serial0:115200n8"; }; usb_phy0: phy0 { compatible = "usb-nop-xceiv"; #phy-cells = <0>; - reset-gpios = <&gpio0 7 1>; /* MIO 7, GPIO_ACTIVE_LOW */ }; }; +&clkc { + ps-clk-frequency = <33333333>; +}; + &gem0 { status = "okay"; phy-mode = "rgmii-id"; phy-handle = <ðernet_phy>; ethernet_phy: ethernet-phy@0 { - compatible = "marvell,88e1512"; - device_type = "ethernet-phy"; reg = <0>; }; }; @@ -52,45 +65,32 @@ status = "okay"; dr_mode = "host"; usb-phy = <&usb_phy0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usb0_default>; }; -&qspi { - status = "okay"; - primary_flash: ps7-qspi@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "micron,m25p80", "spansion,s25fl128s", "jedec,spi-nor"; - reg = <0x0>; - spi-max-frequency = <50000000>; - /* Example 16M partition table using U-Boot + U-Boot SPL */ - partition@0x0 { - label = "boot"; - reg = <0x0 0xe0000>; - }; - partition@0xe0000 { - label = "ubootenv"; - reg = <0xe0000 0x20000>; - }; - partition@0x100000 { - label = "uboot"; - reg = <0x100000 0x100000>; +&pinctrl0 { + pinctrl_usb0_default: usb0-default { + mux { + groups = "usb0_0_grp"; + function = "usb0"; }; - partition@0x200000 { - label = "kernel"; - reg = <0x200000 0x4f0000>; - }; - partition@0x6f0000 { - label = "devicetree"; - reg = <0x6f0000 0x10000>; + + conf { + groups = "usb0_0_grp"; + slew-rate = <0>; + io-standard = <1>; }; - partition@0x700000 { - label = "rootfs"; - reg = <0x700000 0x400000>; + + conf-rx { + pins = "MIO29", "MIO31", "MIO36"; + bias-high-impedance; }; - partition@0xb00000 { - label = "spare"; - reg = <0xb00000 0x500000>; + + conf-tx { + pins = "MIO28", "MIO30", "MIO32", "MIO33", "MIO34", + "MIO35", "MIO37", "MIO38", "MIO39"; + bias-disable; }; }; }; - -- 2.11.0 -- _______________________________________________ meta-xilinx mailing list [email protected] https://lists.yoctoproject.org/listinfo/meta-xilinx
