2010/4/13 Doug Semler <[email protected]>:
> I have to run but I quickly looked at it and it looks like there may
> be an parentheses around %1 in InterlockedIncrement64 and
> InterlockedDecrement16 inline declarations in winnt.h which are being
> expanded to ((%rcx)) in the assembly (which is incorrect).
>
Yes, this is the issue. The following code exposes it completely
(without the variation in command line parameters):
#include <windows.h>
int main()
{
LONG64 bar = 41;
LONG64 foo = InterlockedIncrement64(&bar);
return (int) foo;
}
prompt> gcc -c -m64 -O2 foo.c -save-temps
foo.s: Assembler messages:
foo.s:15: Error: missing ')'
foo.s:15: Error: junk `(%rsp))' after expression
Offending line of foo.s:
lock
xaddq %rax,(40(%rsp))
# 0 "" 2
/NO_APP
movl 40(%rsp), %eax
Note the extra parenthesis around the dest register location of the
xaddq instruction.
The following patch fixes this for both InterlockedIncrement64 and
InterlockedDecrement16:
mingw-w64-headers/include/ChangeLog:
* winnt.h (inline InterlockedDecrement16, InterlockedIncrement64):
Remove parentheses from destination regsiter
diff --git i/mingw-w64-headers/include/winnt.h
w/mingw-w64-headers/include/winnt.h
index 2c0be70..8a336bc 100644
--- i/mingw-w64-headers/include/winnt.h
+++ w/mingw-w64-headers/include/winnt.h
@@ -1259,7 +1259,7 @@ typedef DWORD LCID;
__CRT_INLINE SHORT InterlockedDecrement16(SHORT volatile *Addend) {
SHORT ret = -1;
__asm__ __volatile__("lock\n\t"
- "xaddw %0,(%1)"
+ "xaddw %0,%1"
: "+r" (ret), "+m" (*Addend)
: : "memory");
return ret - 1;
@@ -1345,7 +1345,7 @@ typedef DWORD LCID;
__CRT_INLINE LONG64 InterlockedIncrement64(LONG64 volatile *Addend) {
LONG64 ret = 1LL;
__asm__ __volatile__ ("lock\n\t"
- "xaddq %0,(%1)"
+ "xaddq %0,%1"
: "+r" (ret), "+m" (*Addend)
: : "memory");
return ret + 1LL;
------------------------------------------------------------------------------
Download Intel® Parallel Studio Eval
Try the new software tools for yourself. Speed compiling, find bugs
proactively, and fine-tune applications for parallel performance.
See why Intel Parallel Studio got high marks during beta.
http://p.sf.net/sfu/intel-sw-dev
_______________________________________________
Mingw-w64-public mailing list
[email protected]
https://lists.sourceforge.net/lists/listinfo/mingw-w64-public
