I did a build of gsl-1.15 using gcc.exe (tdm64-1) 4.6.1 under MSYS, and I used
the following command line for configure:
./configure CFLAGS="-g -O2 -march=native -fexceptions"
--prefix=/c/gsl-1.15_64_-g_O2 &> gsl-1.15_configure.out
I was hoping that gcc would recognize my Intel Core i5-2410M Processor and
optimize the gsl code accordingly.
Yet gsl's config.log has the following line in the "Platform" section display:
uname -m = i686
According to Wikipedia, "i686" maps to its "P6 (microarchitecture)" article,
which says, "The P6 microarchitecture is the sixth generation Intel x86
microarchitecture." Apparently, that's a 32-bit Pentium architecture, as I
understand it.
That does not sound anything like an i5, 64-bit processor with all its extended
instruction set.
I'm wondering just what architecture the build was optimized for.
[I am also wondering whether the gsl build overrode my specification of
"-march=native" or whether this 64-bit version of gcc I used just cannot
recognize, and/or do an optimized build for, an Intel Core i5-2410M Processor,
not even just a generic x86-64 processor, if I am to believe the "uname -m =
i686".]
Does anyone know the answer to this?
Or is gsl's config.log file just plain wrong about the target code?
---
More specific questions:
In the manual for gcc version 4.6.3 there is this description for
machine-dependent options in the "3.17.15 Intel 386 and AMD x86-64 Options"
section:
-mtune=cpu-type
For the cpu-type=native option value, there is this description:
This selects the CPU to tune for at compilation time bydetermining the
processor type of the compiling machine. Using‘-mtune=native’ will produce code
optimized for the local machineunder the constraints of the selected
instruction set. Using‘-march=native’ will enable all instruction subsets
supported bythe local machine.......While picking a specific cpu-type will
schedule things appropriately for that particular chip, the compiler will not
generate any code that does not run on the i386 without the ‘-march=cpu-type’
option being used.
There is are a few more options of interest:
corei7
corei7-avx
core-avx-i
[These suggest that gcc ought to be able to pretty specifically target my i5
processor when "-march=native" is used. Of particular interest is whether
"-march=core-avx-i" is the most specific value, other than "native",
appropriate to my i5 processor. Is it? I don't recognize a couple of the
core-avx-i acronymns for instruction sets (which are MMX, SSE, SSE2,
SSE3,SSSE3, SSE4.1, SSE4.2, AVX, AES and PCLMUL; Wikipedia says my i5 processor
has instruction sets up to and including AVX in this list, but I don't
recognize AES and PCLMUL). I would not want to generate code that would choke
my processor.]
...
-march=cpu-type
Generate instructions for the machine type cpu-type. The choices for
cpu-type are the same as for ‘-mtune’. Moreover, specifying ‘-march=cpu-type’
implies ‘-mtune=cpu-type’.
So it seems that "-march=native" is the most optimal choice for "-march".
But just how finely specific is gcc capable of being in the choice of
architecture to optimize for???
Am I really getting target code optimized for my processor better than for any
alternative x86-64 processor?
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