Hello, first thanks for interesting in this subject, but sadly I have disappoint you about it, I fear. The cause for the inability to align to 32-byte alignment is neither to seek in gcc, nor in mingw-w64 itself. It is a consequence of the SEH-information required by the x64 ABI (see here as reference either msdn, or ibm's IA64 exception-specification). Sadly there is no way to express by it any kind of stack-alignment. So it is impossible to write code, which brings AVX to proper stack-location within x64-ABI. The ABI itself makes sure that on function-entry stack has a 16-byte alignment, so 64-bit sse-registers can be stored aligned. Another weakness in this prologue-description used by x64 is that register with more then 64-bit width can't be expressed. This is a reason why the upper 8 bytes of a ymm-register are treated as volatile.
Only way to work-a-round that is to do manual alignment of function, and making sure that you won't try to unwind over such a function. The mentioned prologue/epilogue script on stack-overflow article seems to do exactly this. Regards, Kai Tietz 2015-09-11 23:53 GMT+02:00 Gabe Al-Ghalith <[email protected]>: > Please see: > http://stackoverflow.com/questions/5983389/how-to-align-stack-at-32-byte-boundary-in-gcc > > and > http://stackoverflow.com/questions/32213338/gcc-vector-extensions-avx2-builtin-shuffle-crashes-when-m64-is-used > > Basically, AVX (since 2011) and now Skylake Xeon (with AVX-512) will be > completely unusable on Windows. Please fix this! > > Thanks, > Gabe > > ------------------------------------------------------------------------------ > > _______________________________________________ > Mingw-w64-public mailing list > [email protected] > https://lists.sourceforge.net/lists/listinfo/mingw-w64-public > ------------------------------------------------------------------------------ _______________________________________________ Mingw-w64-public mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/mingw-w64-public
