Hi, > This suggests the two are not compatible? Cortex-M0+ is not compatible unfortunately.
Current MirageOS requires an OS(plus hypervisor)-based backend layer such as Linux/KVM including peripheral device drivers. However, any backend layer for microcontrollers is not officially supported yet. You will need to develop several components below to support RP2040: (You can find related porting activities in [1] [2] [3]) 1. Cortex-M0+ ready OCaml compiler I guess [1] has a Cortex-M4 ready OCaml compiler. You will be able to take advantage of it for Cortex-M0+. 2. Device handling frontend layer in MirageOS MirageOS now supports only limited device types commonly used in cloud computing. It does not support UART, GPIO, SPI and other peripherals as usually seen on many microcontrollers. 3. Backend layer including peripheral device drivers Implementation of this can vary depending on your approach. For example, I utilized Solo5 and FreeRTOS as a backend layer in [3]. In addition, you will have to consider the required memory size of a MirageOS application. Further implementation to reduce the application size as described in [1] may be needed for the small RAM on RP2040. [1] https://tarides.com/internships/porting-mirageos-to-iot-devices (porting to a Cortex-M4 device) [2] https://github.com/dinosaure/gilbraltar (porting to Raspi4 with a baremetal-based backend layer) [3] https://github.com/TImada/mirage-embedded-repo (porting to microcontrollers with a FreeRTOS-based backend layer) Regards, -- Takayuki Imada > On Nov 20, 2022, at 15:57, Trivik Bhavnani <sacc...@umwelten.xyz> wrote: > > > Hi, > > Is it feasible to run MirageOS on an RP2040 ? > > We're working on a wearable, whose exoskeleton stitches together a few dozen > RP2040s, and need to commit to a programming stack so wouldn't mind some > advice. Pardon the ill-phrased question but I don't understand code (or > 'engineering') yet. > > https://mirage.io/docs/arm64 says "MirageOS unikernels can run on 64-bit ARM > Linux systems". While the RP2040 has a "Dual-core Arm Cortex-M0+ processor" > and the Arm Cortex-M0+ is a "32-bit RISC processor". This suggests the two > are not compatible? > > Any pointers to how to figure this out would be welcome. > > Cheers, > Trivik > > Trivik R. Bhavnani | Æsthetics Bootstrapper | Bombay, India > Compossible Umwelten Private Limited | M +91.98 21 55 18 37
