On Fri, 9 Sep 2011 14:11:28 -0700 Mike Larkin <mlar...@azathoth.net> wrote:
> This is a known issue with MTRRs on that model and a few others. > The MTRRs are not being reprogrammed properly on resume, and the > result is a large range of memory resuming as non-cacheable. > > It is on the radar to be fixed (a few of us have looked at this but > no fix has come yet). > > Here's what I did: > > 1. memconfig list - note the non-bios memory ranges at the end of > the list > 2. make yourself a script that you can run as root after resume. > Mine looks like this: > > > memconfig set -b 0x0 -l 0x80000000 write-back > memconfig set -b 0x80000000 -l 0x40000000 write-back > memconfig set -b 0x100000000 -l 0x100000000 write-back > memconfig set -b 0x200000000 -l 0x40000000 write-back > > You'll need to get the base and length values from step 1. > Basically, you're just resetting the cacheability bits to whatever > 'memconfig list' says they should be. > > This will probably be fixed at some point, but for now, it's not. > > -ml crazy responsetime, i'll give that a try, thx alot!
