On 02/06/14 12:52, Joerg Goltermann wrote:
> Hi,
>
> On 06.02.2014 10:26, Marc Peters wrote:
>> Hi List,
>>
>> we have a couple of Supermicro boxes with Supmicro X10SLM+-LN4F Boards.
>> These are featuring the Intel i210AT Chipsets. Are there any plans or
>> patches to get them working? Downloaded today's snapshot but they aren't
>> getting configured either.
>>
>> Is anyone working on it (and have a patch for me to test ;))?
>
>
> yesterday I got my I210 cards for testing and this is the first
> version of a patch. The card can be used but I did rare testing
> on it.
>
> I can't find an unknown ethernet device in your attached
> dmesg, maybe this device is attached on an unsupported
> pci bridge?
These are the cards:
ppb2 at pci0 dev 28 function 2 "Intel 8 Series PCIE" rev 0xd5: msi
pci3 at ppb2 bus 3
"Intel I210" rev 0x03 at pci3 dev 0 function 0 not configured
ppb3 at pci0 dev 28 function 3 "Intel 8 Series PCIE" rev 0xd5: msi
pci4 at ppb3 bus 4
"Intel I210" rev 0x03 at pci4 dev 0 function 0 not configured
ppb4 at pci0 dev 28 function 6 "Intel 8 Series PCIE" rev 0xd5: msi
pci5 at ppb4 bus 5
"Intel I210" rev 0x03 at pci5 dev 0 function 0 not configured
ppb5 at pci0 dev 28 function 7 "Intel 8 Series PCIE" rev 0xd5: msi
pci6 at ppb5 bus 6
"Intel I210" rev 0x03 at pci6 dev 0 function 0 not configured
It's a quad core onboard.
I will give your patch a try, thanks.
>
>
>
> It would be really cool if we can get do the split of the em
> driver in e1000 and igb to get closer to the original Intel code.
> Which will make further updates easier and support a lot of
> new features like multiple queues ....
>
>
>
>
> Index: if_em.c
> ===================================================================
> RCS file: /cvs/src/sys/dev/pci/if_em.c,v
> retrieving revision 1.275
> diff -u -p -r1.275 if_em.c
> --- if_em.c 28 Dec 2013 03:34:54 -0000 1.275
> +++ if_em.c 6 Feb 2014 10:49:24 -0000
> @@ -144,6 +144,13 @@ const struct pci_matchid em_devices[] =
> { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I350_FIBER },
> { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I350_SERDES },
> { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I350_SGMII },
> + { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I210_COPPER },
> + { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I210_FIBER },
> + { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I210_SERDES },
> + { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I210_SGMII },
> + { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I210_COPPER_NF },
> + { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I210_SERDES_NF },
> + { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I211_COPPER },
> { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ICH8_82567V_3 },
> { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ICH8_IFE },
> { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ICH8_IFE_G },
> @@ -408,6 +415,8 @@ em_attach(struct device *parent, struct
> case em_82575:
> case em_82580:
> case em_i350:
> + case em_i210:
> + case em_i211:
> case em_ich9lan:
> case em_ich10lan:
> case em_80003es2lan:
> @@ -475,7 +484,8 @@ em_attach(struct device *parent, struct
> }
>
> if (sc->hw.mac_type == em_80003es2lan || sc->hw.mac_type ==
> em_82575 ||
> - sc->hw.mac_type == em_82580 || sc->hw.mac_type == em_i350) {
> + sc->hw.mac_type == em_82580 || sc->hw.mac_type == em_i350 ||
> + sc->hw.mac_type == em_i210 || sc->hw.mac_type == em_i211 ) {
> uint32_t reg = EM_READ_REG(&sc->hw, E1000_STATUS);
> sc->hw.bus_func = (reg & E1000_STATUS_FUNC_MASK) >>
> E1000_STATUS_FUNC_SHIFT;
> @@ -776,6 +786,10 @@ em_init(void *arg)
> case em_i350:
> pba = E1000_PBA_32K; /* 32K for Rx, 16K for Tx */
> break;
> + case em_i210:
> + case em_i211:
> + pba = E1000_PBA_34K;
> + break;
> case em_82573: /* 82573: Total Packet Buffer is 32K */
> /* Jumbo frames not supported */
> pba = E1000_PBA_12K; /* 12K for Rx, 20K for Tx */
> @@ -1119,7 +1133,8 @@ em_encap(struct em_softc *sc, struct mbu
> goto fail;
>
> if (sc->hw.mac_type >= em_82543 && sc->hw.mac_type != em_82575 &&
> - sc->hw.mac_type != em_82580 && sc->hw.mac_type != em_i350)
> + sc->hw.mac_type != em_82580 && sc->hw.mac_type != em_i350 &&
> + sc->hw.mac_type != em_i210 && sc->hw.mac_type != em_i211)
> em_transmit_checksum_setup(sc, m_head, &txd_upper, &txd_lower);
> else
> txd_upper = txd_lower = 0;
> @@ -1758,7 +1773,9 @@ em_hardware_init(struct em_softc *sc)
> sc->hw.mac_type == em_82572 ||
> sc->hw.mac_type == em_82575 ||
> sc->hw.mac_type == em_82580 ||
> - sc->hw.mac_type == em_i350)) {
> + sc->hw.mac_type == em_i350 ||
> + sc->hw.mac_type == em_i210 ||
> + sc->hw.mac_type == em_i211)) {
> uint16_t phy_tmp = 0;
>
> /* Speed up time to link by disabling smart power down */
> @@ -1838,13 +1855,15 @@ em_setup_interface(struct em_softc *sc)
> ifp->if_capabilities = IFCAP_VLAN_MTU;
>
> #if NVLAN > 0
> - if (sc->hw.mac_type != em_82575 && sc->hw.mac_type != em_82580 &&
> - sc->hw.mac_type != em_i350)
> + if (sc->hw.mac_type >= em_82543 && sc->hw.mac_type != em_82580 &&
> + sc->hw.mac_type != em_i350 && sc->hw.mac_type != em_i210 &&
> + sc->hw.mac_type != em_i211)
> ifp->if_capabilities |= IFCAP_VLAN_HWTAGGING;
> #endif
>
> if (sc->hw.mac_type >= em_82543 && sc->hw.mac_type != em_82575 &&
> - sc->hw.mac_type != em_82580 && sc->hw.mac_type != em_i350)
> + sc->hw.mac_type != em_82580 && sc->hw.mac_type != em_i350 &&
> + sc->hw.mac_type != em_i210 && sc->hw.mac_type != em_i211)
> ifp->if_capabilities |= IFCAP_CSUM_TCPv4 | IFCAP_CSUM_UDPv4;
>
> /*
> @@ -2199,7 +2218,8 @@ em_initialize_transmit_unit(struct em_so
> sc->txd_cmd = E1000_TXD_CMD_IFCS;
>
> if (sc->hw.mac_type == em_82575 || sc->hw.mac_type == em_82580 ||
> - sc->hw.mac_type == em_i350) {
> + sc->hw.mac_type == em_i350 || sc->hw.mac_type == em_i210 ||
> + sc->hw.mac_type == em_i211) {
> /* 82575/6 need to enable the TX queue and lack the IDE bit */
> reg_tctl = E1000_READ_REG(&sc->hw, TXDCTL);
> reg_tctl |= E1000_TXDCTL_QUEUE_ENABLE;
> @@ -2624,7 +2644,8 @@ em_initialize_receive_unit(struct em_sof
> * asked to or not. So ask for stripped CRC here and
> * cope in rxeof
> */
> - if (sc->hw.mac_type == em_i350)
> + if (sc->hw.mac_type == em_i350 || sc->hw.mac_type == em_i210 ||
> + sc->hw.mac_type == em_i211)
> reg_rctl |= E1000_RCTL_SECRC;
>
> switch (sc->rx_buffer_len) {
> @@ -2661,7 +2682,8 @@ em_initialize_receive_unit(struct em_sof
> E1000_WRITE_REG(&sc->hw, RDTR, 0x20);
>
> if (sc->hw.mac_type == em_82575 || sc->hw.mac_type == em_82580 ||
> - sc->hw.mac_type == em_i350) {
> + sc->hw.mac_type == em_i350 || sc->hw.mac_type == em_i210 ||
> + sc->hw.mac_type == em_i211) {
> /* 82575/6 need to enable the RX queue */
> uint32_t reg;
> reg = E1000_READ_REG(&sc->hw, RXDCTL);
> @@ -2846,7 +2868,6 @@ em_rxeof(struct em_softc *sc)
> "(nrx %d, filled %d)", i, sc->rx_ndescs,
> sc->last_rx_desc_filled);
> }
> -
> m_cluncount(m, 1);
> sc->rx_ndescs--;
>
> @@ -2859,7 +2880,9 @@ em_rxeof(struct em_softc *sc)
> if (desc_len < ETHER_CRC_LEN) {
> len = 0;
> prev_len_adj = ETHER_CRC_LEN - desc_len;
> - } else if (sc->hw.mac_type == em_i350)
> + } else if (sc->hw.mac_type == em_i350 ||
> + sc->hw.mac_type == em_i210 ||
> + sc->hw.mac_type == em_i211)
> len = desc_len;
> else
> len = desc_len - ETHER_CRC_LEN;
> @@ -3123,10 +3146,10 @@ em_fill_descriptors(u_int64_t address, u
> /* Let us first check the address...*/
> u_int32_t safe_terminator;
> if (length <= 4) {
> - desc_array->descriptor[0].address = address;
> - desc_array->descriptor[0].length = length;
> - desc_array->elements = 1;
> - return desc_array->elements;
> + desc_array->descriptor[0].address = address;
> + desc_array->descriptor[0].length = length;
> + desc_array->elements = 1;
> + return desc_array->elements;
> }
> safe_terminator = (u_int32_t)((((u_int32_t)address & 0x7) +
> (length & 0xF)) & 0xF);
> /* if it does not fall between 0x1 to 0x4 and 0x9 to 0xC then
> return */
> @@ -3135,10 +3158,10 @@ em_fill_descriptors(u_int64_t address, u
> safe_terminator < 9) ||
> (safe_terminator > 0xC &&
> safe_terminator <= 0xF)) {
> - desc_array->descriptor[0].address = address;
> - desc_array->descriptor[0].length = length;
> - desc_array->elements = 1;
> - return desc_array->elements;
> + desc_array->descriptor[0].address = address;
> + desc_array->descriptor[0].length = length;
> + desc_array->elements = 1;
> + return desc_array->elements;
> }
>
> desc_array->descriptor[0].address = address;
> Index: if_em.h
> ===================================================================
> RCS file: /cvs/src/sys/dev/pci/if_em.h,v
> retrieving revision 1.50
> diff -u -p -r1.50 if_em.h
> --- if_em.h 7 Aug 2013 01:06:34 -0000 1.50
> +++ if_em.h 6 Feb 2014 10:49:24 -0000
> @@ -95,7 +95,8 @@ POSSIBILITY OF SUCH DAMAGE.
> * (num_tx_desc * sizeof(struct em_tx_desc)) % 128 == 0
> */
> #define EM_MAX_TXD_82543 256
> -#define EM_MAX_TXD 512
> +#define EM_MAX_TXD 2048
> +
>
> /*
> * EM_RXD - Maximum number of receive Descriptors
> @@ -111,7 +112,7 @@ POSSIBILITY OF SUCH DAMAGE.
> * (num_tx_desc * sizeof(struct em_tx_desc)) % 128 == 0
> */
> #define EM_MAX_RXD_82543 256
> -#define EM_MAX_RXD 256
> +#define EM_MAX_RXD 2048
>
> /*
> * MAX_INTS_PER_SEC (ITR - Interrupt Throttle Register)
> Index: if_em_hw.c
> ===================================================================
> RCS file: /cvs/src/sys/dev/pci/if_em_hw.c,v
> retrieving revision 1.75
> diff -u -p -r1.75 if_em_hw.c
> --- if_em_hw.c 27 Nov 2013 01:13:10 -0000 1.75
> +++ if_em_hw.c 6 Feb 2014 10:49:24 -0000
> @@ -261,6 +261,7 @@ em_set_phy_type(struct em_hw *hw)
> break;
> case I82580_I_PHY_ID:
> case I350_I_PHY_ID:
> + case I210_I_PHY_ID:
> hw->phy_type = em_phy_82580;
> break;
> case BME1000_E_PHY_ID:
> @@ -527,6 +528,21 @@ em_set_mac_type(struct em_hw *hw)
> hw->initialize_hw_bits_disable = 1;
> hw->eee_enable = 1;
> break;
> + case E1000_DEV_ID_I210_COPPER:
> + case E1000_DEV_ID_I210_FIBER:
> + case E1000_DEV_ID_I210_SERDES:
> + case E1000_DEV_ID_I210_SGMII:
> + case E1000_DEV_ID_I210_COPPER_NF:
> + case E1000_DEV_ID_I210_SERDES_NF:
> + hw->mac_type = em_i210;
> + hw->initialize_hw_bits_disable = 1;
> + hw->eee_enable = 1;
> + break;
> + case E1000_DEV_ID_I211_COPPER:
> + hw->mac_type = em_i211;
> + hw->initialize_hw_bits_disable = 1;
> + hw->eee_enable = 1;
> + break;
> case E1000_DEV_ID_80003ES2LAN_COPPER_SPT:
> case E1000_DEV_ID_80003ES2LAN_SERDES_SPT:
> case E1000_DEV_ID_80003ES2LAN_COPPER_DPT:
> @@ -5178,7 +5194,11 @@ em_match_gig_phy(struct em_hw *hw)
> break;
> case em_82580:
> case em_i350:
> - if (hw->phy_id == I82580_I_PHY_ID || hw->phy_id ==
> I350_I_PHY_ID) {
> + case em_i210:
> + case em_i211:
> + if (hw->phy_id == I82580_I_PHY_ID ||
> + hw->phy_id == I350_I_PHY_ID ||
> + hw->phy_id == I210_I_PHY_ID) {
> uint32_t mdic;
>
> mdic = EM_READ_REG(hw, E1000_MDICNFG);
> @@ -5455,6 +5475,8 @@ em_init_eeprom_params(struct em_hw *hw)
> case em_82574:
> case em_82575:
> case em_82580:
> + case em_i210:
> + case em_i211:
> case em_i350:
> eeprom->type = em_eeprom_spi;
> eeprom->opcode_bits = 8;
> Index: if_em_hw.h
> ===================================================================
> RCS file: /cvs/src/sys/dev/pci/if_em_hw.h,v
> retrieving revision 1.56
> diff -u -p -r1.56 if_em_hw.h
> --- if_em_hw.h 27 Nov 2013 01:13:10 -0000 1.56
> +++ if_em_hw.h 6 Feb 2014 10:49:24 -0000
> @@ -72,6 +72,8 @@ typedef enum {
> em_82575,
> em_82580,
> em_i350,
> + em_i210,
> + em_i211,
> em_80003es2lan,
> em_ich8lan,
> em_ich9lan,
> @@ -570,6 +572,14 @@ int32_t em_check_phy_reset_block(struct
> #define E1000_DEV_ID_I350_SERDES 0x1523
> #define E1000_DEV_ID_I350_SGMII 0x1524
> #define E1000_DEV_ID_82576_QUAD_CU_ET2 0x1526
> +#define E1000_DEV_ID_I210_COPPER 0x1533
> +#define E1000_DEV_ID_I210_FIBER 0x1536
> +#define E1000_DEV_ID_I210_SERDES 0x1537
> +#define E1000_DEV_ID_I210_SGMII 0x1538
> +#define E1000_DEV_ID_I211_COPPER 0x1539
> +#define E1000_DEV_ID_I210_COPPER_NF 0x157b
> +#define E1000_DEV_ID_I210_SERDES_NF 0x157c
> +#define E1000_DEV_ID_I210_SERDES_NF 0x157c
> #define E1000_DEV_ID_I350_DA4 0x1546
> #define E1000_DEV_ID_82574L 0x10D3
> #define E1000_DEV_ID_EP80579_LAN_1 0x5040
> @@ -3372,6 +3382,7 @@ struct em_host_command_info {
> #define M88E1111_I_PHY_ID 0x01410CC0
> #define L1LXT971A_PHY_ID 0x001378E0
> #define GG82563_E_PHY_ID 0x01410CA0
> +#define I210_I_PHY_ID 0x01410C00
> #define BME1000_E_PHY_ID 0x01410CB0
> #define BME1000_E_PHY_ID_R2 0x01410CB1
> #define I82577_E_PHY_ID 0x01540050
