On Sun, Jul 22, 2007 at 10:12:03PM +0200, Maxim Bourmistrov wrote: > Hello! > <subject>: > > #define RL_PSTATE_D0 0x0000 > #define RL_PSTATE_D1 0x0002 <------------- typo ? > #define RL_PSTATE_D2 0x0002 > #define RL_PSTATE_D3 0x0003 > > /maxim
Yes, but these a) aren't used and b) are the values already specified in the standard PCI power capabilities >From dev/pci/pcireg.h: /* * Power Management Control Status Register; access via capability pointer. */ #define PCI_PMCSR 0x04 #define PCI_PMCSR_STATE_MASK 0x03 #define PCI_PMCSR_STATE_D0 0x00 #define PCI_PMCSR_STATE_D1 0x01 #define PCI_PMCSR_STATE_D2 0x02 #define PCI_PMCSR_STATE_D3 0x03 I'll look into removing the RL definitions later today.
