The patch titled
ppc32: Re-order cputable for 750CXe DD2.4 entry
has been added to the -mm tree. Its filename is
ppc32-re-order-cputable-for-750cxe-dd24-entry.patch
Patches currently in -mm which might be from [EMAIL PROTECTED] are
ppc32-re-order-cputable-for-750cxe-dd24-entry.patch
ppc32-add-cputable-entry-for-750cxe-dd24-gekko.patch
From: [EMAIL PROTECTED] (Arthur Othieno)
"745/755" (pvr_value:0x00083000) is a catch-all entry.
Since arch/ppc/kernel/misc.S:identify_cpu() returns on first match,
move this lower in the table so 750CXe DD2.4 (pvr_value:0x00083214)
may be correctly enumerated.
Signed-off-by: Arthur Othieno <[EMAIL PROTECTED]>
Signed-off-by: Andrew Morton <[EMAIL PROTECTED]>
---
arch/ppc/kernel/cputable.c | 28 ++++++++++++++--------------
1 files changed, 14 insertions(+), 14 deletions(-)
diff -puN
arch/ppc/kernel/cputable.c~ppc32-re-order-cputable-for-750cxe-dd24-entry
arch/ppc/kernel/cputable.c
---
devel/arch/ppc/kernel/cputable.c~ppc32-re-order-cputable-for-750cxe-dd24-entry
2005-08-30 18:10:32.000000000 -0700
+++ devel-akpm/arch/ppc/kernel/cputable.c 2005-08-30 18:10:32.000000000
-0700
@@ -198,20 +198,6 @@ struct cpu_spec cpu_specs[] = {
.num_pmcs = 4,
.cpu_setup = __setup_cpu_750
},
- { /* 745/755 */
- .pvr_mask = 0xfffff000,
- .pvr_value = 0x00083000,
- .cpu_name = "745/755",
- .cpu_features = CPU_FTR_COMMON |
- CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE |
- CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_TAU |
- CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP,
- .cpu_user_features = COMMON_PPC,
- .icache_bsize = 32,
- .dcache_bsize = 32,
- .num_pmcs = 4,
- .cpu_setup = __setup_cpu_750
- },
{ /* 750CX (80100 and 8010x?) */
.pvr_mask = 0xfffffff0,
.pvr_value = 0x00080100,
@@ -254,6 +240,20 @@ struct cpu_spec cpu_specs[] = {
.num_pmcs = 4,
.cpu_setup = __setup_cpu_750cx
},
+ { /* 745/755 */
+ .pvr_mask = 0xfffff000,
+ .pvr_value = 0x00083000,
+ .cpu_name = "745/755",
+ .cpu_features = CPU_FTR_COMMON |
+ CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE |
+ CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_TAU |
+ CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP,
+ .cpu_user_features = COMMON_PPC,
+ .icache_bsize = 32,
+ .dcache_bsize = 32,
+ .num_pmcs = 4,
+ .cpu_setup = __setup_cpu_750
+ },
{ /* 750FX rev 1.x */
.pvr_mask = 0xffffff00,
.pvr_value = 0x70000100,
_
-
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