The patch titled
     Intel IOMMU: clflush_cache_range now takes size param
has been removed from the -mm tree.  Its filename was
     intel-iommu-clflush_cache_range-now-takes-size-param.patch

This patch was dropped because it was merged into mainline or a subsystem tree

------------------------------------------------------
Subject: Intel IOMMU: clflush_cache_range now takes size param
From: "Keshavamurthy, Anil S" <[EMAIL PROTECTED]>

Introduce the size param for clflush_cache_range().

Signed-off-by: Anil S Keshavamurthy <[EMAIL PROTECTED]>
Cc: Andi Kleen <[EMAIL PROTECTED]>
Cc: Peter Zijlstra <[EMAIL PROTECTED]>
Cc: Muli Ben-Yehuda <[EMAIL PROTECTED]>
Cc: "Siddha, Suresh B" <[EMAIL PROTECTED]>
Cc: Arjan van de Ven <[EMAIL PROTECTED]>
Cc: Ashok Raj <[EMAIL PROTECTED]>
Cc: "David S. Miller" <[EMAIL PROTECTED]>
Cc: Christoph Lameter <[EMAIL PROTECTED]>
Cc: Greg KH <[EMAIL PROTECTED]>
Cc: Thomas Gleixner <[EMAIL PROTECTED]>
Cc: Ingo Molnar <[EMAIL PROTECTED]>
Signed-off-by: Andrew Morton <[EMAIL PROTECTED]>
---

 arch/x86/mm/pageattr_64.c    |    6 +++---
 include/asm-x86/cacheflush.h |    1 +
 2 files changed, 4 insertions(+), 3 deletions(-)

diff -puN 
arch/x86/mm/pageattr_64.c~intel-iommu-clflush_cache_range-now-takes-size-param 
arch/x86/mm/pageattr_64.c
--- 
a/arch/x86/mm/pageattr_64.c~intel-iommu-clflush_cache_range-now-takes-size-param
+++ a/arch/x86/mm/pageattr_64.c
@@ -61,10 +61,10 @@ static struct page *split_large_page(uns
        return base;
 } 
 
-static void cache_flush_page(void *adr)
+void clflush_cache_range(void *adr, int size)
 {
        int i;
-       for (i = 0; i < PAGE_SIZE; i += boot_cpu_data.x86_clflush_size)
+       for (i = 0; i < size; i += boot_cpu_data.x86_clflush_size)
                clflush(adr+i);
 }
 
@@ -80,7 +80,7 @@ static void flush_kernel_map(void *arg)
                asm volatile("wbinvd" ::: "memory");
        else list_for_each_entry(pg, l, lru) {
                void *adr = page_address(pg);
-               cache_flush_page(adr);
+               clflush_cache_range(adr, PAGE_SIZE);
        }
        __flush_tlb_all();
 }
diff -puN 
include/asm-x86/cacheflush.h~intel-iommu-clflush_cache_range-now-takes-size-param
 include/asm-x86/cacheflush.h
--- 
a/include/asm-x86/cacheflush.h~intel-iommu-clflush_cache_range-now-takes-size-param
+++ a/include/asm-x86/cacheflush.h
@@ -27,6 +27,7 @@
 void global_flush_tlb(void);
 int change_page_attr(struct page *page, int numpages, pgprot_t prot);
 int change_page_attr_addr(unsigned long addr, int numpages, pgprot_t prot);
+void clflush_cache_range(void *addr, int size);
 
 #ifdef CONFIG_DEBUG_PAGEALLOC
 /* internal debugging function */
_

Patches currently in -mm which might be from [EMAIL PROTECTED] are

origin.patch

-
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