Author: zoltan
Date: 2008-02-14 09:01:02 -0500 (Thu, 14 Feb 2008)
New Revision: 95629
Modified:
trunk/mono/mono/mini/ChangeLog
trunk/mono/mono/mini/mini-amd64.c
trunk/mono/mono/mini/mini-ops.h
trunk/mono/mono/mini/mini.c
trunk/mono/mono/mini/mini.h
Log:
2008-02-14 Zoltan Varga <[EMAIL PROTECTED]>
* mini-amd64.c (mono_arch_output_basic_block): Sync with the version on
the
linear IR branch.
* mini.c (mono_op_imm_to_op): New helper function.
* mini-ops.h: Add some opcodes from linear IR branch.
Modified: trunk/mono/mono/mini/ChangeLog
===================================================================
--- trunk/mono/mono/mini/ChangeLog 2008-02-14 13:59:24 UTC (rev 95628)
+++ trunk/mono/mono/mini/ChangeLog 2008-02-14 14:01:02 UTC (rev 95629)
@@ -1,3 +1,12 @@
+2008-02-14 Zoltan Varga <[EMAIL PROTECTED]>
+
+ * mini-amd64.c (mono_arch_output_basic_block): Sync with the version on
the
+ linear IR branch.
+
+ * mini.c (mono_op_imm_to_op): New helper function.
+
+ * mini-ops.h: Add some opcodes from linear IR branch.
+
2008-02-13 Zoltan Varga <[EMAIL PROTECTED]>
* mini-alpha.h mini-alpha.c tramp-alpha.c: Alpha port updates from
Sergey Tikhonov
Modified: trunk/mono/mono/mini/mini-amd64.c
===================================================================
--- trunk/mono/mono/mini/mini-amd64.c 2008-02-14 13:59:24 UTC (rev 95628)
+++ trunk/mono/mono/mini/mini-amd64.c 2008-02-14 14:01:02 UTC (rev 95629)
@@ -85,7 +85,8 @@
*/
const char*
-mono_arch_regname (int reg) {
+mono_arch_regname (int reg)
+{
switch (reg) {
case AMD64_RAX: return "%rax";
case AMD64_RBX: return "%rbx";
@@ -1663,6 +1664,7 @@
}
break;
case OP_COMPARE_IMM:
+ case OP_LCOMPARE_IMM:
/* OP_COMPARE_IMM (reg, 0)
* -->
* OP_AMD64_TEST_NULL (reg)
@@ -2113,26 +2115,16 @@
case OP_REM_IMM:
case OP_IDIV_IMM:
case OP_IREM_IMM:
+ case OP_IDIV_UN_IMM:
+ case OP_IREM_UN_IMM:
NEW_INS (cfg, ins, temp, OP_ICONST);
temp->inst_c0 = ins->inst_imm;
temp->dreg = mono_regstate_next_int (cfg->rs);
- switch (ins->opcode) {
- case OP_DIV_IMM:
- ins->opcode = OP_LDIV;
- break;
- case OP_REM_IMM:
- ins->opcode = OP_LREM;
- break;
- case OP_IDIV_IMM:
- ins->opcode = OP_IDIV;
- break;
- case OP_IREM_IMM:
- ins->opcode = OP_IREM;
- break;
- }
+ ins->opcode = mono_op_imm_to_op (ins->opcode);
ins->sreg2 = temp->dreg;
break;
case OP_COMPARE_IMM:
+ case OP_LCOMPARE_IMM:
if (!amd64_is_imm32 (ins->inst_imm)) {
NEW_INS (cfg, ins, temp, OP_I8CONST);
temp->inst_c0 = ins->inst_imm;
@@ -2585,10 +2577,32 @@
g_assert (amd64_is_imm32 (ins->inst_imm));
amd64_mov_membase_imm (code, ins->inst_destbasereg,
ins->inst_offset, ins->inst_imm, 8);
break;
+ case OP_LOAD_MEM:
+ case OP_LOADI8_MEM:
+ // FIXME: Decompose this earlier
+ if (amd64_is_imm32 (ins->inst_imm))
+ amd64_mov_reg_mem (code, ins->dreg,
ins->inst_imm, sizeof (gpointer));
+ else {
+ amd64_mov_reg_imm (code, ins->dreg,
ins->inst_imm);
+ amd64_mov_reg_membase (code, ins->dreg,
ins->dreg, 0, 8);
+ }
+ break;
+ case OP_LOADI4_MEM:
+ amd64_mov_reg_imm (code, ins->dreg, ins->inst_imm);
+ amd64_movsxd_reg_membase (code, ins->dreg, ins->dreg,
0);
+ break;
case OP_LOADU4_MEM:
amd64_mov_reg_imm (code, ins->dreg, ins->inst_p0);
amd64_mov_reg_membase (code, ins->dreg, ins->dreg, 0,
4);
break;
+ case OP_LOADU1_MEM:
+ amd64_mov_reg_imm (code, ins->dreg, ins->inst_imm);
+ amd64_widen_membase (code, ins->dreg, ins->dreg, 0,
FALSE, FALSE);
+ break;
+ case OP_LOADU2_MEM:
+ amd64_mov_reg_imm (code, ins->dreg, ins->inst_imm);
+ amd64_widen_membase (code, ins->dreg, ins->dreg, 0,
FALSE, TRUE);
+ break;
case OP_LOAD_MEMBASE:
case OP_LOADI8_MEMBASE:
g_assert (amd64_is_imm32 (ins->inst_offset));
@@ -2616,17 +2630,21 @@
amd64_mov_reg_memindex_size (code, ins->dreg,
ins->inst_basereg, 0, ins->inst_indexreg, 0, 8);
break;
case OP_LCONV_TO_I1:
+ case OP_ICONV_TO_I1:
case OP_SEXT_I1:
amd64_widen_reg (code, ins->dreg, ins->sreg1, TRUE,
FALSE);
break;
case OP_LCONV_TO_I2:
+ case OP_ICONV_TO_I2:
case OP_SEXT_I2:
amd64_widen_reg (code, ins->dreg, ins->sreg1, TRUE,
TRUE);
break;
case OP_LCONV_TO_U1:
+ case OP_ICONV_TO_U1:
amd64_widen_reg (code, ins->dreg, ins->sreg1, FALSE,
FALSE);
break;
case OP_LCONV_TO_U2:
+ case OP_ICONV_TO_U2:
amd64_widen_reg (code, ins->dreg, ins->sreg1, FALSE,
TRUE);
break;
case OP_ZEXT_I4:
@@ -2635,12 +2653,13 @@
break;
case OP_SEXT_I4:
amd64_movsxd_reg_reg (code, ins->dreg, ins->sreg1);
- break;
+ break;
case OP_COMPARE:
case OP_LCOMPARE:
amd64_alu_reg_reg (code, X86_CMP, ins->sreg1,
ins->sreg2);
break;
case OP_COMPARE_IMM:
+ case OP_LCOMPARE_IMM:
g_assert (amd64_is_imm32 (ins->inst_imm));
amd64_alu_reg_imm (code, X86_CMP, ins->sreg1,
ins->inst_imm);
break;
@@ -2653,20 +2672,64 @@
case OP_AMD64_TEST_NULL:
amd64_test_reg_reg (code, ins->sreg1, ins->sreg1);
break;
+
+ case OP_X86_ADD_REG_MEMBASE:
+ amd64_alu_reg_membase_size (code, X86_ADD, ins->sreg1,
ins->sreg2, ins->inst_offset, 4);
+ break;
+ case OP_X86_SUB_REG_MEMBASE:
+ amd64_alu_reg_membase_size (code, X86_SUB, ins->sreg1,
ins->sreg2, ins->inst_offset, 4);
+ break;
+ case OP_X86_AND_REG_MEMBASE:
+ amd64_alu_reg_membase_size (code, X86_AND, ins->sreg1,
ins->sreg2, ins->inst_offset, 4);
+ break;
+ case OP_X86_OR_REG_MEMBASE:
+ amd64_alu_reg_membase_size (code, X86_OR, ins->sreg1,
ins->sreg2, ins->inst_offset, 4);
+ break;
+ case OP_X86_XOR_REG_MEMBASE:
+ amd64_alu_reg_membase_size (code, X86_XOR, ins->sreg1,
ins->sreg2, ins->inst_offset, 4);
+ break;
+
+ case OP_X86_ADD_MEMBASE:
+ amd64_alu_reg_membase_size (code, X86_ADD, ins->sreg1,
ins->sreg2, ins->inst_offset, 4);
+ break;
+ case OP_X86_SUB_MEMBASE:
+ amd64_alu_reg_membase_size (code, X86_SUB, ins->sreg1,
ins->sreg2, ins->inst_offset, 4);
+ break;
case OP_X86_ADD_MEMBASE_IMM:
/* FIXME: Make a 64 version too */
amd64_alu_membase_imm_size (code, X86_ADD,
ins->inst_basereg, ins->inst_offset, ins->inst_imm, 4);
break;
- case OP_X86_ADD_MEMBASE:
- amd64_alu_reg_membase_size (code, X86_ADD, ins->sreg1,
ins->sreg2, ins->inst_offset, 4);
- break;
case OP_X86_SUB_MEMBASE_IMM:
g_assert (amd64_is_imm32 (ins->inst_imm));
amd64_alu_membase_imm_size (code, X86_SUB,
ins->inst_basereg, ins->inst_offset, ins->inst_imm, 4);
break;
- case OP_X86_SUB_MEMBASE:
- amd64_alu_reg_membase_size (code, X86_SUB, ins->sreg1,
ins->sreg2, ins->inst_offset, 4);
+ case OP_X86_AND_MEMBASE_IMM:
+ g_assert (amd64_is_imm32 (ins->inst_imm));
+ amd64_alu_membase_imm_size (code, X86_AND,
ins->inst_basereg, ins->inst_offset, ins->inst_imm, 4);
break;
+ case OP_X86_OR_MEMBASE_IMM:
+ g_assert (amd64_is_imm32 (ins->inst_imm));
+ amd64_alu_membase_imm_size (code, X86_OR,
ins->inst_basereg, ins->inst_offset, ins->inst_imm, 4);
+ break;
+ case OP_X86_XOR_MEMBASE_IMM:
+ g_assert (amd64_is_imm32 (ins->inst_imm));
+ amd64_alu_membase_imm_size (code, X86_XOR,
ins->inst_basereg, ins->inst_offset, ins->inst_imm, 4);
+ break;
+ case OP_X86_ADD_MEMBASE_REG:
+ amd64_alu_membase_reg_size (code, X86_ADD,
ins->inst_basereg, ins->inst_offset, ins->sreg2, 4);
+ break;
+ case OP_X86_SUB_MEMBASE_REG:
+ amd64_alu_membase_reg_size (code, X86_SUB,
ins->inst_basereg, ins->inst_offset, ins->sreg2, 4);
+ break;
+ case OP_X86_AND_MEMBASE_REG:
+ amd64_alu_membase_reg_size (code, X86_AND,
ins->inst_basereg, ins->inst_offset, ins->sreg2, 4);
+ break;
+ case OP_X86_OR_MEMBASE_REG:
+ amd64_alu_membase_reg_size (code, X86_OR,
ins->inst_basereg, ins->inst_offset, ins->sreg2, 4);
+ break;
+ case OP_X86_XOR_MEMBASE_REG:
+ amd64_alu_membase_reg_size (code, X86_XOR,
ins->inst_basereg, ins->inst_offset, ins->sreg2, 4);
+ break;
case OP_X86_INC_MEMBASE:
amd64_inc_membase_size (code, ins->inst_basereg,
ins->inst_offset, 4);
break;
@@ -2680,6 +2743,7 @@
amd64_dec_reg_size (code, ins->dreg, 4);
break;
case OP_X86_MUL_MEMBASE:
+ case OP_X86_MUL_MEMBASE_REG:
amd64_imul_reg_membase_size (code, ins->sreg1,
ins->sreg2, ins->inst_offset, 4);
break;
case OP_AMD64_ICOMPARE_MEMBASE_REG:
@@ -2688,12 +2752,85 @@
case OP_AMD64_ICOMPARE_MEMBASE_IMM:
amd64_alu_membase_imm_size (code, X86_CMP,
ins->inst_basereg, ins->inst_offset, ins->inst_imm, 4);
break;
+ case OP_AMD64_COMPARE_MEMBASE_REG:
+ amd64_alu_membase_reg_size (code, X86_CMP,
ins->inst_basereg, ins->inst_offset, ins->sreg2, 8);
+ break;
+ case OP_AMD64_COMPARE_MEMBASE_IMM:
+ g_assert (amd64_is_imm32 (ins->inst_imm));
+ amd64_alu_membase_imm_size (code, X86_CMP,
ins->inst_basereg, ins->inst_offset, ins->inst_imm, 8);
+ break;
+ case OP_X86_COMPARE_MEMBASE8_IMM:
+ amd64_alu_membase8_imm_size (code, X86_CMP,
ins->inst_basereg, ins->inst_offset, ins->inst_imm, 4);
+ break;
case OP_AMD64_ICOMPARE_REG_MEMBASE:
amd64_alu_reg_membase_size (code, X86_CMP, ins->sreg1,
ins->sreg2, ins->inst_offset, 4);
break;
+ case OP_AMD64_COMPARE_REG_MEMBASE:
+ amd64_alu_reg_membase_size (code, X86_CMP, ins->sreg1,
ins->sreg2, ins->inst_offset, 8);
+ break;
+
+ case OP_AMD64_ADD_REG_MEMBASE:
+ amd64_alu_reg_membase_size (code, X86_ADD, ins->sreg1,
ins->sreg2, ins->inst_offset, 8);
+ break;
+ case OP_AMD64_SUB_REG_MEMBASE:
+ amd64_alu_reg_membase_size (code, X86_SUB, ins->sreg1,
ins->sreg2, ins->inst_offset, 8);
+ break;
+ case OP_AMD64_AND_REG_MEMBASE:
+ amd64_alu_reg_membase_size (code, X86_AND, ins->sreg1,
ins->sreg2, ins->inst_offset, 8);
+ break;
+ case OP_AMD64_OR_REG_MEMBASE:
+ amd64_alu_reg_membase_size (code, X86_OR, ins->sreg1,
ins->sreg2, ins->inst_offset, 8);
+ break;
+ case OP_AMD64_XOR_REG_MEMBASE:
+ amd64_alu_reg_membase_size (code, X86_XOR, ins->sreg1,
ins->sreg2, ins->inst_offset, 8);
+ break;
+
+ case OP_AMD64_ADD_MEMBASE_REG:
+ amd64_alu_membase_reg_size (code, X86_ADD,
ins->inst_basereg, ins->inst_offset, ins->sreg2, 8);
+ break;
+ case OP_AMD64_SUB_MEMBASE_REG:
+ amd64_alu_membase_reg_size (code, X86_SUB,
ins->inst_basereg, ins->inst_offset, ins->sreg2, 8);
+ break;
+ case OP_AMD64_AND_MEMBASE_REG:
+ amd64_alu_membase_reg_size (code, X86_AND,
ins->inst_basereg, ins->inst_offset, ins->sreg2, 8);
+ break;
+ case OP_AMD64_OR_MEMBASE_REG:
+ amd64_alu_membase_reg_size (code, X86_OR,
ins->inst_basereg, ins->inst_offset, ins->sreg2, 8);
+ break;
+ case OP_AMD64_XOR_MEMBASE_REG:
+ amd64_alu_membase_reg_size (code, X86_XOR,
ins->inst_basereg, ins->inst_offset, ins->sreg2, 8);
+ break;
+
+ case OP_AMD64_ADD_MEMBASE_IMM:
+ g_assert (amd64_is_imm32 (ins->inst_imm));
+ amd64_alu_membase_imm_size (code, X86_ADD,
ins->inst_basereg, ins->inst_offset, ins->inst_imm, 8);
+ break;
+ case OP_AMD64_SUB_MEMBASE_IMM:
+ g_assert (amd64_is_imm32 (ins->inst_imm));
+ amd64_alu_membase_imm_size (code, X86_SUB,
ins->inst_basereg, ins->inst_offset, ins->inst_imm, 8);
+ break;
+ case OP_AMD64_AND_MEMBASE_IMM:
+ g_assert (amd64_is_imm32 (ins->inst_imm));
+ amd64_alu_membase_imm_size (code, X86_AND,
ins->inst_basereg, ins->inst_offset, ins->inst_imm, 8);
+ break;
+ case OP_AMD64_OR_MEMBASE_IMM:
+ g_assert (amd64_is_imm32 (ins->inst_imm));
+ amd64_alu_membase_imm_size (code, X86_OR,
ins->inst_basereg, ins->inst_offset, ins->inst_imm, 8);
+ break;
+ case OP_AMD64_XOR_MEMBASE_IMM:
+ g_assert (amd64_is_imm32 (ins->inst_imm));
+ amd64_alu_membase_imm_size (code, X86_XOR,
ins->inst_basereg, ins->inst_offset, ins->inst_imm, 8);
+ break;
+
case OP_BREAK:
amd64_breakpoint (code);
break;
+ case OP_NOP:
+ case OP_DUMMY_USE:
+ case OP_DUMMY_STORE:
+ case OP_NOT_REACHED:
+ case OP_NOT_NULL:
+ break;
case OP_ADDCC:
case OP_LADD:
amd64_alu_reg_reg (code, X86_ADD, ins->sreg1,
ins->sreg2);
@@ -2702,6 +2839,7 @@
amd64_alu_reg_reg (code, X86_ADC, ins->sreg1,
ins->sreg2);
break;
case OP_ADD_IMM:
+ case OP_LADD_IMM:
g_assert (amd64_is_imm32 (ins->inst_imm));
amd64_alu_reg_imm (code, X86_ADD, ins->dreg,
ins->inst_imm);
break;
@@ -2717,6 +2855,7 @@
amd64_alu_reg_reg (code, X86_SBB, ins->sreg1,
ins->sreg2);
break;
case OP_SUB_IMM:
+ case OP_LSUB_IMM:
g_assert (amd64_is_imm32 (ins->inst_imm));
amd64_alu_reg_imm (code, X86_SUB, ins->dreg,
ins->inst_imm);
break;
@@ -2728,6 +2867,7 @@
amd64_alu_reg_reg (code, X86_AND, ins->sreg1,
ins->sreg2);
break;
case OP_AND_IMM:
+ case OP_LAND_IMM:
g_assert (amd64_is_imm32 (ins->inst_imm));
amd64_alu_reg_imm (code, X86_AND, ins->sreg1,
ins->inst_imm);
break;
@@ -2850,6 +2990,7 @@
amd64_alu_reg_reg (code, X86_OR, ins->sreg1,
ins->sreg2);
break;
case OP_OR_IMM:
+ case OP_LOR_IMM:
g_assert (amd64_is_imm32 (ins->inst_imm));
amd64_alu_reg_imm (code, X86_OR, ins->sreg1,
ins->inst_imm);
break;
@@ -2857,6 +2998,7 @@
amd64_alu_reg_reg (code, X86_XOR, ins->sreg1,
ins->sreg2);
break;
case OP_XOR_IMM:
+ case OP_LXOR_IMM:
g_assert (amd64_is_imm32 (ins->inst_imm));
amd64_alu_reg_imm (code, X86_XOR, ins->sreg1,
ins->inst_imm);
break;
@@ -3026,13 +3168,24 @@
case OP_IBGT:
case OP_IBGE:
case OP_IBLE:
+ case OP_LBEQ:
+ case OP_LBLT:
+ case OP_LBGT:
+ case OP_LBGE:
+ case OP_LBLE:
case OP_IBNE_UN:
case OP_IBLT_UN:
case OP_IBGT_UN:
case OP_IBGE_UN:
case OP_IBLE_UN:
+ case OP_LBNE_UN:
+ case OP_LBLT_UN:
+ case OP_LBGT_UN:
+ case OP_LBGE_UN:
+ case OP_LBLE_UN:
EMIT_COND_BRANCH (ins, cc_table [mono_opcode_to_cond
(ins->opcode)], cc_signed_table [mono_opcode_to_cond (ins->opcode)]);
break;
+
case OP_LNOT:
amd64_not_reg (code, ins->sreg1);
break;
@@ -3269,6 +3422,23 @@
code = mono_emit_stack_alloc (code, ins);
amd64_mov_reg_reg (code, ins->dreg, AMD64_RSP, 8);
break;
+ case OP_LOCALLOC_IMM: {
+ guint32 size = ins->inst_imm;
+ size = (size + (MONO_ARCH_FRAME_ALIGNMENT - 1)) & ~
(MONO_ARCH_FRAME_ALIGNMENT - 1);
+
+ if (ins->flags & MONO_INST_INIT) {
+ /* FIXME: Optimize this */
+ amd64_mov_reg_imm (code, ins->dreg, size);
+ ins->sreg1 = ins->dreg;
+
+ code = mono_emit_stack_alloc (code, ins);
+ amd64_mov_reg_reg (code, ins->dreg, AMD64_RSP,
8);
+ } else {
+ amd64_alu_reg_imm (code, X86_SUB, AMD64_RSP,
size);
+ amd64_mov_reg_reg (code, ins->dreg, AMD64_RSP,
8);
+ }
+ break;
+ }
case OP_THROW: {
amd64_mov_reg_reg (code, AMD64_ARG_REG1, ins->sreg1, 8);
code = emit_call (cfg, code,
MONO_PATCH_INFO_INTERNAL_METHOD,
@@ -3311,8 +3481,6 @@
case OP_LABEL:
ins->inst_c0 = code - cfg->native_code;
break;
- case OP_NOP:
- break;
case OP_BR:
if (ins->flags & MONO_INST_BRLABEL) {
if (ins->inst_i0->inst_c0) {
@@ -3342,14 +3510,19 @@
amd64_jump_reg (code, ins->sreg1);
break;
case OP_CEQ:
+ case OP_LCEQ:
case OP_ICEQ:
case OP_CLT:
+ case OP_LCLT:
case OP_ICLT:
case OP_CGT:
case OP_ICGT:
+ case OP_LCGT:
case OP_CLT_UN:
+ case OP_LCLT_UN:
case OP_ICLT_UN:
case OP_CGT_UN:
+ case OP_LCGT_UN:
case OP_ICGT_UN:
amd64_set_reg (code, cc_table [mono_opcode_to_cond
(ins->opcode)], ins->dreg, cc_signed_table [mono_opcode_to_cond (ins->opcode)]);
amd64_widen_reg (code, ins->dreg, ins->dreg, FALSE,
FALSE);
@@ -3364,6 +3537,16 @@
case OP_COND_EXC_GE_UN:
case OP_COND_EXC_LE:
case OP_COND_EXC_LE_UN:
+ case OP_COND_EXC_IEQ:
+ case OP_COND_EXC_INE_UN:
+ case OP_COND_EXC_ILT:
+ case OP_COND_EXC_ILT_UN:
+ case OP_COND_EXC_IGT:
+ case OP_COND_EXC_IGT_UN:
+ case OP_COND_EXC_IGE:
+ case OP_COND_EXC_IGE_UN:
+ case OP_COND_EXC_ILE:
+ case OP_COND_EXC_ILE_UN:
EMIT_COND_SYSTEM_EXCEPTION (cc_table
[mono_opcode_to_cond (ins->opcode)], cc_signed_table [mono_opcode_to_cond
(ins->opcode)], ins->inst_p1);
break;
case OP_COND_EXC_OV:
@@ -3374,22 +3557,12 @@
(ins->opcode <
OP_COND_EXC_NE_UN), ins->inst_p1);
break;
case OP_COND_EXC_IOV:
+ case OP_COND_EXC_INO:
case OP_COND_EXC_IC:
+ case OP_COND_EXC_INC:
EMIT_COND_SYSTEM_EXCEPTION (branch_cc_table
[ins->opcode - OP_COND_EXC_IEQ],
(ins->opcode <
OP_COND_EXC_INE_UN), ins->inst_p1);
break;
- case OP_LBEQ:
- case OP_LBLT:
- case OP_LBGT:
- case OP_LBGE:
- case OP_LBLE:
- case OP_LBNE_UN:
- case OP_LBLT_UN:
- case OP_LBGT_UN:
- case OP_LBGE_UN:
- case OP_LBLE_UN:
- EMIT_COND_BRANCH (ins, cc_table [mono_opcode_to_cond
(ins->opcode)], cc_signed_table [mono_opcode_to_cond (ins->opcode)]);
- break;
/* floating point opcodes */
case OP_R8CONST: {
@@ -3502,6 +3675,9 @@
g_assert_not_reached ();
amd64_fild_membase (code, ins->inst_basereg,
ins->inst_offset, FALSE);
break;
+ case OP_FCONV_TO_R4:
+ /* FIXME: nothing to do ?? */
+ break;
case OP_FCONV_TO_I1:
code = emit_float_to_int (cfg, code, ins->dreg,
ins->sreg1, 1, TRUE);
break;
@@ -3514,6 +3690,9 @@
case OP_FCONV_TO_U2:
code = emit_float_to_int (cfg, code, ins->dreg,
ins->sreg1, 2, FALSE);
break;
+ case OP_FCONV_TO_U4:
+ code = emit_float_to_int (cfg, code, ins->dreg,
ins->sreg1, 4, FALSE);
+ break;
case OP_FCONV_TO_I4:
case OP_FCONV_TO_I:
code = emit_float_to_int (cfg, code, ins->dreg,
ins->sreg1, 4, TRUE);
@@ -4094,7 +4273,7 @@
amd64_alu_reg_imm (code, X86_CMP, AMD64_RAX, X86_FP_C0);
EMIT_COND_BRANCH (ins, X86_CC_NE, FALSE);
break;
- case OP_CKFINITE: {
+ case OP_CKFINITE:
if (use_sse2) {
/* Transfer value to the fp stack */
amd64_alu_reg_imm (code, X86_SUB, AMD64_RSP,
16);
@@ -4114,7 +4293,6 @@
if (use_sse2)
amd64_alu_reg_imm (code, X86_ADD, AMD64_RSP,
16);
break;
- }
case OP_TLS_GET: {
code = emit_tls_get (code, ins->dreg, ins->inst_offset);
break;
Modified: trunk/mono/mono/mini/mini-ops.h
===================================================================
--- trunk/mono/mono/mini/mini-ops.h 2008-02-14 13:59:24 UTC (rev 95628)
+++ trunk/mono/mono/mini/mini-ops.h 2008-02-14 14:01:02 UTC (rev 95629)
@@ -12,6 +12,7 @@
MINI_OP(OP_LCOMPARE, "lcompare")
MINI_OP(OP_ICOMPARE, "icompare")
MINI_OP(OP_ICOMPARE_IMM, "icompare_imm")
+MINI_OP(OP_LCOMPARE_IMM, "lcompare_imm")
MINI_OP(OP_LOCAL, "local")
MINI_OP(OP_ARG, "arg")
MINI_OP(OP_ARGLIST, "oparglist")
@@ -29,6 +30,7 @@
MINI_OP(OP_SETRET, "setret")
MINI_OP(OP_SETFRET, "setfret")
MINI_OP(OP_SETLRET, "setlret")
+MINI_OP(OP_LOCALLOC_IMM, "localloc_imm")
MINI_OP(OP_CHECK_THIS, "checkthis")
MINI_OP(OP_VOIDCALL, "voidcall")
MINI_OP(OP_VOIDCALLVIRT, "voidcallvirt")
@@ -111,6 +113,13 @@
MINI_OP(OP_STORER4_MEMINDEX,"storer4_memindex")
MINI_OP(OP_STORER8_MEMINDEX,"storer8_memindex")
+/* Loads from an absolute address */
+MINI_OP(OP_LOAD_MEM, "load_mem")
+MINI_OP(OP_LOADI8_MEM, "loadi8_mem")
+MINI_OP(OP_LOADI4_MEM, "loadi4_mem")
+MINI_OP(OP_LOADU1_MEM, "loadu1_mem")
+MINI_OP(OP_LOADU2_MEM, "loadu2_mem")
+
MINI_OP(OP_LOADR8_SPILL_MEMBASE,"loadr8_spill_membase")
MINI_OP(OP_LOADU4_MEM,"loadu4_mem")
MINI_OP(OP_MOVE, "move")
@@ -228,6 +237,10 @@
MINI_OP(OP_LCONV_TO_OVF_I8,"long_conv_to_ovf_i8")
MINI_OP(OP_LCONV_TO_OVF_U8,"long_conv_to_ovf_u8")
+MINI_OP(OP_LAND_IMM, "long_and_imm")
+MINI_OP(OP_LOR_IMM, "long_or_imm")
+MINI_OP(OP_LXOR_IMM, "long_xor_imm")
+
MINI_OP(OP_LCEQ, "long_ceq")
MINI_OP(OP_LCGT, "long_cgt")
MINI_OP(OP_LCGT_UN,"long_cgt_un")
@@ -516,6 +529,7 @@
MINI_OP(OP_DUMMY_USE, "dummy_use")
MINI_OP(OP_DUMMY_STORE, "dummy_store")
MINI_OP(OP_NOT_REACHED, "not_reached")
+MINI_OP(OP_NOT_NULL, "not_null")
/* Atomic specific
@@ -558,6 +572,21 @@
MINI_OP(OP_X86_AND_MEMBASE_IMM, "x86_and_membase_imm")
MINI_OP(OP_X86_OR_MEMBASE_IMM, "x86_or_membase_imm")
MINI_OP(OP_X86_XOR_MEMBASE_IMM, "x86_xor_membase_imm")
+
+MINI_OP(OP_X86_ADD_MEMBASE_REG, "x86_add_membase_reg")
+MINI_OP(OP_X86_SUB_MEMBASE_REG, "x86_sub_membase_reg")
+MINI_OP(OP_X86_AND_MEMBASE_REG, "x86_and_membase_reg")
+MINI_OP(OP_X86_OR_MEMBASE_REG, "x86_or_membase_reg")
+MINI_OP(OP_X86_XOR_MEMBASE_REG, "x86_xor_membase_reg")
+MINI_OP(OP_X86_MUL_MEMBASE_REG, "x86_mul_membase_reg")
+
+MINI_OP(OP_X86_ADD_REG_MEMBASE, "x86_add_reg_membase")
+MINI_OP(OP_X86_SUB_REG_MEMBASE, "x86_sub_reg_membase")
+MINI_OP(OP_X86_MUL_REG_MEMBASE, "x86_mul_reg_membase")
+MINI_OP(OP_X86_AND_REG_MEMBASE, "x86_and_reg_membase")
+MINI_OP(OP_X86_OR_REG_MEMBASE, "x86_or_reg_membase")
+MINI_OP(OP_X86_XOR_REG_MEMBASE, "x86_xor_reg_membase")
+
MINI_OP(OP_X86_PUSH_MEMBASE, "x86_push_membase")
MINI_OP(OP_X86_PUSH_IMM, "x86_push_imm")
MINI_OP(OP_X86_PUSH, "x86_push")
@@ -587,6 +616,31 @@
MINI_OP(OP_AMD64_ICOMPARE_MEMBASE_REG, "amd64_icompare_membase_reg")
MINI_OP(OP_AMD64_ICOMPARE_MEMBASE_IMM, "amd64_icompare_membase_imm")
MINI_OP(OP_AMD64_ICOMPARE_REG_MEMBASE, "amd64_icompare_reg_membase")
+MINI_OP(OP_AMD64_COMPARE_MEMBASE_REG, "amd64_compare_membase_reg")
+MINI_OP(OP_AMD64_COMPARE_MEMBASE_IMM, "amd64_compare_membase_imm")
+MINI_OP(OP_AMD64_COMPARE_REG_MEMBASE, "amd64_compare_reg_membase")
+
+MINI_OP(OP_AMD64_ADD_MEMBASE_REG, "amd64_add_membase_reg")
+MINI_OP(OP_AMD64_SUB_MEMBASE_REG, "amd64_sub_membase_reg")
+MINI_OP(OP_AMD64_AND_MEMBASE_REG, "amd64_and_membase_reg")
+MINI_OP(OP_AMD64_OR_MEMBASE_REG, "amd64_or_membase_reg")
+MINI_OP(OP_AMD64_XOR_MEMBASE_REG, "amd64_xor_membase_reg")
+MINI_OP(OP_AMD64_MUL_MEMBASE_REG, "amd64_mul_membase_reg")
+
+MINI_OP(OP_AMD64_ADD_MEMBASE_IMM, "amd64_add_membase_imm")
+MINI_OP(OP_AMD64_SUB_MEMBASE_IMM, "amd64_sub_membase_imm")
+MINI_OP(OP_AMD64_AND_MEMBASE_IMM, "amd64_and_membase_imm")
+MINI_OP(OP_AMD64_OR_MEMBASE_IMM, "amd64_or_membase_imm")
+MINI_OP(OP_AMD64_XOR_MEMBASE_IMM, "amd64_xor_membase_imm")
+MINI_OP(OP_AMD64_MUL_MEMBASE_IMM, "amd64_mul_membase_imm")
+
+MINI_OP(OP_AMD64_ADD_REG_MEMBASE, "amd64_add_reg_membase")
+MINI_OP(OP_AMD64_SUB_REG_MEMBASE, "amd64_sub_reg_membase")
+MINI_OP(OP_AMD64_AND_REG_MEMBASE, "amd64_and_reg_membase")
+MINI_OP(OP_AMD64_OR_REG_MEMBASE, "amd64_or_reg_membase")
+MINI_OP(OP_AMD64_XOR_REG_MEMBASE, "amd64_xor_reg_membase")
+MINI_OP(OP_AMD64_MUL_REG_MEMBASE, "amd64_mul_reg_membase")
+
MINI_OP(OP_AMD64_OUTARG_ALIGN_STACK, "amd64_outarg_align_stack")
MINI_OP(OP_AMD64_LOADI8_MEMINDEX, "amd64_loadi8_memindex")
MINI_OP(OP_AMD64_SAVE_SP_TO_LMF, "amd64_save_sp_to_lmf")
Modified: trunk/mono/mono/mini/mini.c
===================================================================
--- trunk/mono/mono/mini/mini.c 2008-02-14 13:59:24 UTC (rev 95628)
+++ trunk/mono/mono/mini/mini.c 2008-02-14 14:01:02 UTC (rev 95629)
@@ -1672,6 +1672,92 @@
return mono_type_to_stind (type);
}
+int
+mono_op_imm_to_op (int opcode)
+{
+ switch (opcode) {
+ case OP_ADD_IMM:
+ return OP_PADD;
+ case OP_IADD_IMM:
+ return OP_IADD;
+ case OP_LADD_IMM:
+ return OP_LADD;
+ case OP_ISUB_IMM:
+ return OP_ISUB;
+ case OP_LSUB_IMM:
+ return OP_LSUB;
+ case OP_AND_IMM:
+#if SIZEOF_VOID_P == 4
+ return OP_IAND;
+#else
+ return OP_LAND;
+#endif
+ case OP_IAND_IMM:
+ return OP_IAND;
+ case OP_LAND_IMM:
+ return OP_LAND;
+ case OP_IOR_IMM:
+ return OP_IOR;
+ case OP_LOR_IMM:
+ return OP_LOR;
+ case OP_IXOR_IMM:
+ return OP_IXOR;
+ case OP_LXOR_IMM:
+ return OP_LXOR;
+ case OP_ISHL_IMM:
+ return OP_ISHL;
+ case OP_LSHL_IMM:
+ return OP_LSHL;
+ case OP_ISHR_IMM:
+ return OP_ISHR;
+ case OP_LSHR_IMM:
+ return OP_LSHR;
+ case OP_ISHR_UN_IMM:
+ return OP_ISHR_UN;
+ case OP_LSHR_UN_IMM:
+ return OP_LSHR_UN;
+ case OP_IDIV_IMM:
+ return OP_IDIV;
+ case OP_IDIV_UN_IMM:
+ return OP_IDIV_UN;
+ case OP_IREM_UN_IMM:
+ return OP_IREM_UN;
+ case OP_IREM_IMM:
+ return OP_IREM;
+ case OP_DIV_IMM:
+#if SIZEOF_VOID_P == 4
+ return OP_IDIV;
+#else
+ return OP_LDIV;
+#endif
+ case OP_REM_IMM:
+#if SIZEOF_VOID_P == 4
+ return OP_IREM;
+#else
+ return OP_LREM;
+#endif
+ case OP_ADDCC_IMM:
+ return OP_ADDCC;
+ case OP_ADC_IMM:
+ return OP_ADC;
+ case OP_SUBCC_IMM:
+ return OP_SUBCC;
+ case OP_SBB_IMM:
+ return OP_SBB;
+ case OP_IADC_IMM:
+ return OP_IADC;
+ case OP_ISBB_IMM:
+ return OP_ISBB;
+ case OP_COMPARE_IMM:
+ return OP_COMPARE;
+ case OP_ICOMPARE_IMM:
+ return OP_ICOMPARE;
+ default:
+ printf ("%s\n", mono_inst_name (opcode));
+ g_assert_not_reached ();
+ }
+}
+
/*
* When we need a pointer to the current domain many times in a method, we
* call mono_domain_get() once and we store the result in a local variable.
Modified: trunk/mono/mono/mini/mini.h
===================================================================
--- trunk/mono/mono/mini/mini.h 2008-02-14 13:59:24 UTC (rev 95628)
+++ trunk/mono/mono/mini/mini.h 2008-02-14 14:01:02 UTC (rev 95629)
@@ -1168,6 +1168,7 @@
gboolean mono_is_regsize_var (MonoType *t) MONO_INTERNAL;
CompRelation mono_opcode_to_cond (int opcode) MONO_INTERNAL;
CompType mono_opcode_to_type (int opcode, int cmp_opcode)
MONO_INTERNAL;
+int mono_op_imm_to_op (int opcode) MONO_INTERNAL;
/* methods that must be provided by the arch-specific port */
void mono_arch_init (void) MONO_INTERNAL;
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