Author: zoltan
Date: 2008-02-14 12:56:04 -0500 (Thu, 14 Feb 2008)
New Revision: 95672
Modified:
branches/vargaz/mini-linear-il/mono/mono/mini/ChangeLog
branches/vargaz/mini-linear-il/mono/mono/mini/cpu-sparc.md
branches/vargaz/mini-linear-il/mono/mono/mini/mini-sparc.c
Log:
2008-02-14 Zoltan Varga <[EMAIL PROTECTED]>
* cpu-sparc.md mini-sparc.c: Fix sparc build.
Modified: branches/vargaz/mini-linear-il/mono/mono/mini/ChangeLog
===================================================================
--- branches/vargaz/mini-linear-il/mono/mono/mini/ChangeLog 2008-02-14
17:55:58 UTC (rev 95671)
+++ branches/vargaz/mini-linear-il/mono/mono/mini/ChangeLog 2008-02-14
17:56:04 UTC (rev 95672)
@@ -1,5 +1,7 @@
2008-02-14 Zoltan Varga <[EMAIL PROTECTED]>
+ * cpu-sparc.md mini-sparc.c: Fix sparc build.
+
* mini-x86.c (mono_arch_emit_outarg_vt): Pass a reasonable alignment to
mini_emit_memcpy2 ().
Modified: branches/vargaz/mini-linear-il/mono/mono/mini/cpu-sparc.md
===================================================================
--- branches/vargaz/mini-linear-il/mono/mono/mini/cpu-sparc.md 2008-02-14
17:55:58 UTC (rev 95671)
+++ branches/vargaz/mini-linear-il/mono/mono/mini/cpu-sparc.md 2008-02-14
17:56:04 UTC (rev 95672)
@@ -47,54 +47,19 @@
#
# See the code in mini-sparc32.c for more details on how the specifiers are
used.
#
-
label: len:0
break: len:64
jmp: len:64
br: len:8
-<<<<<<< .working
-jump_table: dest:i len:48
-nop: len:0
-dummy_use: len:0
-dummy_store: len:0
-not_reached: len:0
-not_null: src1:i len:0
-
-sparc_brz: src1:i len: 8
-sparc_brlez: src1:i len: 8
-sparc_brlz: src1:i len: 8
-sparc_brnz: src1:i len: 8
-sparc_brgz: src1:i len: 8
-sparc_brgez: src1:i len: 8
-sparc_cond_exc_eqz: src1:i len:64
-sparc_cond_exc_nez: src1:i len:64
-sparc_cond_exc_ltz: src1:i len:64
-sparc_cond_exc_gtz: src1:i len:64
-sparc_cond_exc_gez: src1:i len:64
-sparc_cond_exc_lez: src1:i len:64
-
-=======
-
->>>>>>> .merge-right.r95529
throw: src1:i len:64
rethrow: src1:i len:64
start_handler: len:64
endfinally: len:64
endfilter: src1:i len:64
-<<<<<<< .working
-call_handler: len:64
conv.ovf.u4: dest:i src1:i len:64
ckfinite: dest:f src1:f len:40
-
-int_mul_ovf: dest:i src1:i src2:i len:64
-int_mul_ovf_un: dest:i src1:i src2:i len:64
-=======
-
-conv.ovf.u4: dest:i src1:i len:64
-ckfinite: dest:f src1:f len:40
->>>>>>> .merge-right.r95529
conv.u: dest:i src1:i len:4
arglist: src1:i
ceq: dest:i len:64
@@ -104,7 +69,6 @@
clt.un: dest:i len:64
localloc: dest:i src1:i len:64
sparc_localloc_imm: dest:i len:64
-localloc_imm: dest:i len:64
compare: src1:i src2:i len:4
icompare: src1:i src2:i len:4
compare_imm: src1:i len:64
@@ -118,7 +82,6 @@
sparc_setfreg_float: dest:f src1:f len:4 clob:r
checkthis: src1:b len:4
oparglist: src1:i len:64
-
call: dest:o clob:c len:40
call_reg: dest:o src1:i len:64 clob:c
call_membase: dest:o src1:b len:64 clob:c
@@ -134,10 +97,6 @@
vcall: len:40 clob:c
vcall_reg: src1:i len:64 clob:c
vcall_membase: src1:b len:64 clob:c
-vcall2: len:40 clob:c
-vcall2_reg: src1:i len:64 clob:c
-vcall2_membase: src1:b len:64 clob:c
-
iconst: dest:i len:64
i8const: dest:i len:64
r4const: dest:f len:64
@@ -166,23 +125,21 @@
loadr8_membase: dest:f src1:b len:64
loadu4_mem: dest:i len:8
move: dest:i src1:i len:4
-
add_imm: dest:i src1:i len:64
addcc_imm: dest:i src1:i len:64
sub_imm: dest:i src1:i len:64
subcc_imm: dest:i src1:i len:64
mul_imm: dest:i src1:i len:64
-div_imm: dest:a src1:i len:64
-div_un_imm: dest:a src1:i len:64
-rem_imm: dest:d src1:i len:64
-rem_un_imm: dest:d src1:i len:64
+div_imm: dest:a src1:i src2:i len:64
+div_un_imm: dest:a src1:i src2:i len:64
+rem_imm: dest:d src1:i src2:i len:64
+rem_un_imm: dest:d src1:i src2:i len:64
and_imm: dest:i src1:i len:64
or_imm: dest:i src1:i len:64
xor_imm: dest:i src1:i len:64
shl_imm: dest:i src1:i len:64
shr_imm: dest:i src1:i len:64
shr_un_imm: dest:i src1:i len:64
-
cond_exc_eq: len:64
cond_exc_ne_un: len:64
cond_exc_lt: len:64
@@ -197,35 +154,6 @@
cond_exc_no: len:64
cond_exc_c: len:64
cond_exc_nc: len:64
-<<<<<<< .working
-
-cond_exc_ieq: len:64
-cond_exc_ine_un: len:64
-cond_exc_ilt: len:64
-cond_exc_ilt_un: len:64
-cond_exc_igt: len:64
-cond_exc_igt_un: len:64
-cond_exc_ige: len:64
-cond_exc_ige_un: len:64
-cond_exc_ile: len:64
-cond_exc_ile_un: len:64
-cond_exc_iov: len:64
-cond_exc_ino: len:64
-cond_exc_ic: len:64
-cond_exc_inc: len:64
-
-long_shl: dest:i src1:i src2:i len:64
-long_shr: dest:i src1:i src2:i len:64
-long_shr_un: dest:i src1:i src2:i len:64
-long_conv_to_ovf_i: dest:i src1:i src2:i len:48
-long_conv_to_ovf_i4_2: dest:i src1:i src2:i len:48
-long_mul_ovf:
-long_conv_to_r_un: dest:f src1:i src2:i len:64
-long_shr_imm: dest:i src1:i len:64
-long_shr_un_imm: dest:i src1:i len:64
-long_shl_imm: dest:i src1:i len:64
-=======
->>>>>>> .merge-right.r95529
float_beq: len:8
float_bne_un: len:64
float_blt: len:8
@@ -245,24 +173,23 @@
float_rem_un: dest:f src1:f src2:f len:64
float_neg: dest:f src1:f len:4
float_not: dest:f src1:f len:4
-
float_conv_to_i1: dest:i src1:f len:40
float_conv_to_i2: dest:i src1:f len:40
float_conv_to_i4: dest:i src1:f len:40
float_conv_to_i8: dest:L src1:f len:40
+float_conv_to_r4: dest:f src1:f len:8
float_conv_to_u4: dest:i src1:f len:40
float_conv_to_u8: dest:L src1:f len:40
float_conv_to_u2: dest:i src1:f len:40
float_conv_to_u1: dest:i src1:f len:40
float_conv_to_i: dest:i src1:f len:40
-float_conv_to_r4: dest:f src1:f len:8
-
float_ceq: dest:i src1:f src2:f len:64
float_cgt: dest:i src1:f src2:f len:64
float_cgt_un: dest:i src1:f src2:f len:64
float_clt: dest:i src1:f src2:f len:64
float_clt_un: dest:i src1:f src2:f len:64
float_conv_to_u: dest:i src1:f len:64
+call_handler: len:64
aot_const: dest:i len:64
adc: dest:i src1:i src2:i len:4
addcc: dest:i src1:i src2:i len:4
@@ -339,19 +266,6 @@
int_ble_un: len:64
int_blt_un: len:64
-<<<<<<< .working
-int_conv_to_i1: dest:i src1:i len:8
-int_conv_to_u1: dest:i src1:i len:8
-int_conv_to_i2: dest:i src1:i len:8
-int_conv_to_u2: dest:i src1:i len:8
-int_conv_to_i4: dest:i src1:i len:4
-int_conv_to_u4: dest:i src1:i len:4
-int_conv_to_i8: dest:i src1:i len:4
-int_conv_to_u8: dest:i src1:i len:4
-int_conv_to_r4: dest:f src1:i len:64
-int_conv_to_r8: dest:f src1:i len:64
-
-=======
# 64 bit opcodes
long_shl: dest:i src1:i src2:i len:64
long_shr: dest:i src1:i src2:i len:64
@@ -363,7 +277,6 @@
long_shr_un_imm: dest:i src1:i len:64
long_shl_imm: dest:i src1:i len:64
->>>>>>> .merge-right.r95529
memory_barrier: len:4
sparc_brz: src1:i len: 8
@@ -378,3 +291,35 @@
sparc_cond_exc_gtz: src1:i len:64
sparc_cond_exc_gez: src1:i len:64
sparc_cond_exc_lez: src1:i len:64
+
+# Linear IR opcodes
+nop: len:0
+dummy_use: len:0
+dummy_store: len:0
+not_reached: len:0
+not_null: src1:i len:0
+
+jump_table: dest:i len:64
+
+cond_exc_ieq: len:64
+cond_exc_ine_un: len:64
+cond_exc_ilt: len:64
+cond_exc_ilt_un: len:64
+cond_exc_igt: len:64
+cond_exc_igt_un: len:64
+cond_exc_ige: len:64
+cond_exc_ige_un: len:64
+cond_exc_ile: len:64
+cond_exc_ile_un: len:64
+cond_exc_iov: len:64
+cond_exc_ino: len:64
+cond_exc_ic: len:64
+cond_exc_inc: len:64
+
+long_conv_to_ovf_i4_2: dest:i src1:i src2:i len:48
+
+vcall2: len:40 clob:c
+vcall2_reg: src1:i len:64 clob:c
+vcall2_membase: src1:b len:64 clob:c
+
+localloc_imm: dest:i len:64
\ No newline at end of file
Modified: branches/vargaz/mini-linear-il/mono/mono/mini/mini-sparc.c
===================================================================
--- branches/vargaz/mini-linear-il/mono/mono/mini/mini-sparc.c 2008-02-14
17:55:58 UTC (rev 95671)
+++ branches/vargaz/mini-linear-il/mono/mono/mini/mini-sparc.c 2008-02-14
17:56:04 UTC (rev 95672)
@@ -802,7 +802,7 @@
sig = mono_method_signature (cfg->method);
- cinfo = get_call_info (m, sig, FALSE);
+ cinfo = get_call_info (cfg, sig, FALSE);
if (sig->ret->type != MONO_TYPE_VOID) {
switch (cinfo->ret.storage) {
@@ -1530,7 +1530,7 @@
sig = call->signature;
n = sig->param_count + sig->hasthis;
- cinfo = get_call_info (sig, sig->pinvoke);
+ cinfo = get_call_info (cfg, sig, sig->pinvoke);
if (sig->ret && MONO_TYPE_ISSTRUCT (sig->ret)) {
/* Set the 'struct/union return pointer' location on the stack
*/
@@ -1588,7 +1588,7 @@
void
mono_arch_emit_setret (MonoCompile *cfg, MonoMethod *method, MonoInst *val)
{
- CallInfo *cinfo = get_call_info (mono_method_signature (method), FALSE);
+ CallInfo *cinfo = get_call_info (cfg, mono_method_signature (method),
FALSE);
switch (cinfo->ret.storage) {
case ArgInIReg:
@@ -1632,64 +1632,6 @@
CompType t;
switch (opcode) {
-<<<<<<< .working
-=======
- case OP_FBGE:
- return sparc_fbge;
- case OP_FBLE:
- return sparc_fble;
- case OP_FBEQ:
- case OP_FCEQ:
- return sparc_fbe;
- case OP_FBLT:
- case OP_FCLT:
- case OP_FCLT_UN:
- return sparc_fbl;
- case OP_FBGT:
- case OP_FCGT:
- case OP_FCGT_UN:
- return sparc_fbg;
- case OP_IBEQ:
- case OP_CEQ:
- case OP_ICEQ:
- case OP_COND_EXC_EQ:
- return sparc_be;
- case OP_IBNE_UN:
- case OP_COND_EXC_NE_UN:
- return sparc_bne;
- case OP_IBLT:
- case OP_CLT:
- case OP_ICLT:
- case OP_COND_EXC_LT:
- return sparc_bl;
- case OP_IBLT_UN:
- case OP_CLT_UN:
- case OP_ICLT_UN:
- case OP_COND_EXC_LT_UN:
- return sparc_blu;
- case OP_IBGT:
- case OP_CGT:
- case OP_ICGT:
- case OP_COND_EXC_GT:
- return sparc_bg;
- case OP_IBGT_UN:
- case OP_CGT_UN:
- case OP_ICGT_UN:
- case OP_COND_EXC_GT_UN:
- return sparc_bgu;
- case OP_IBGE:
- case OP_COND_EXC_GE:
- return sparc_bge;
- case OP_IBGE_UN:
- case OP_COND_EXC_GE_UN:
- return sparc_beu;
- case OP_IBLE:
- case OP_COND_EXC_LE:
- return sparc_ble;
- case OP_IBLE_UN:
- case OP_COND_EXC_LE_UN:
- return sparc_bleu;
->>>>>>> .merge-right.r95529
case OP_COND_EXC_OV:
case OP_COND_EXC_IOV:
return sparc_bvs;
@@ -1700,13 +1642,14 @@
case OP_COND_EXC_NC:
NOT_IMPLEMENTED;
default:
+ rel = mono_opcode_to_cond (opcode);
+ t = mono_opcode_to_type (opcode, -1);
+
+ return cond_to_sparc_cond [rel][t];
break;
- };
+ }
- rel = mono_opcode_to_cond (opcode);
- t = mono_opcode_to_type (opcode, -1);
-
- return cond_to_sparc_cond [rel][t];
+ return -1;
}
#define COMPUTE_DISP(ins) \
@@ -1901,17 +1844,13 @@
void
mono_arch_peephole_pass_1 (MonoCompile *cfg, MonoBasicBlock *bb)
{
-<<<<<<< .working
- MonoInst *ins, *last_ins = NULL;
- ins = bb->code;
-=======
}
void
mono_arch_peephole_pass_2 (MonoCompile *cfg, MonoBasicBlock *bb)
{
- MonoInst *ins, *n;
->>>>>>> .merge-right.r95529
+ MonoInst *ins, *last_ins = NULL;
+ ins = bb->code;
while (ins) {
@@ -2146,33 +2085,11 @@
bb->last_ins = last_ins;
}
-<<<<<<< .working
-=======
void
mono_arch_lowering_pass (MonoCompile *cfg, MonoBasicBlock *bb)
{
}
-static int
-mono_spillvar_offset_float (MonoCompile *cfg, int spillvar)
-{
- MonoSpillInfo **si, *info;
-
- g_assert (spillvar == 0);
-
- si = &cfg->spill_info_float;
-
- if (!*si) {
- *si = info = mono_mempool_alloc (cfg->mempool, sizeof
(MonoSpillInfo));
- cfg->stack_offset += sizeof (double);
- cfg->stack_offset = ALIGN_TO (cfg->stack_offset, 8);
- info->offset = - cfg->stack_offset;
- }
-
- return MONO_SPARC_STACK_BIAS + (*si)->offset;
-}
-
->>>>>>> .merge-right.r95529
/* FIXME: Strange loads from the stack in basic-float.cs:test_2_rem */
static void
@@ -2921,11 +2838,8 @@
sparc_sll_imm (code, ins->sreg1, 16, sparc_o7);
sparc_srl_imm (code, sparc_o7, 16, ins->dreg);
break;
-<<<<<<< .working
case OP_LCONV_TO_OVF_U4:
-=======
case OP_ICONV_TO_OVF_U4:
->>>>>>> .merge-right.r95529
/* Only used on V9 */
sparc_cmp_imm (code, ins->sreg1, 0);
mono_add_patch_info (cfg, (guint8*)(code) -
(cfg)->native_code,
@@ -2941,11 +2855,8 @@
sparc_nop (code);
sparc_mov_reg_reg (code, ins->sreg1, ins->dreg);
break;
-<<<<<<< .working
case OP_LCONV_TO_OVF_I4_UN:
-=======
case OP_ICONV_TO_OVF_I4_UN:
->>>>>>> .merge-right.r95529
/* Only used on V9 */
NOT_IMPLEMENTED;
break;
@@ -3069,13 +2980,10 @@
}
break;
}
-<<<<<<< .working
case OP_IDIV_UN_IMM:
sparc_wry (code, sparc_g0, sparc_g0);
EMIT_ALU_IMM (ins, udiv, FALSE);
break;
-=======
->>>>>>> .merge-right.r95529
case OP_IREM:
/* Sign extend sreg1 into %y */
sparc_sra_imm (code, ins->sreg1, 31, sparc_o7);
@@ -3245,15 +3153,12 @@
mono_add_patch_info (cfg, offset,
(MonoJumpInfoType)ins->inst_i1, ins->inst_p0);
sparc_set_template (code, ins->dreg);
break;
-<<<<<<< .working
case OP_JUMP_TABLE:
mono_add_patch_info (cfg, offset,
(MonoJumpInfoType)ins->inst_i1, ins->inst_p0);
sparc_set_template (code, ins->dreg);
break;
-=======
case OP_ICONV_TO_I4:
case OP_ICONV_TO_U4:
->>>>>>> .merge-right.r95529
case OP_MOVE:
if (ins->sreg1 != ins->dreg)
sparc_mov_reg_reg (code, ins->sreg1, ins->dreg);
@@ -3674,14 +3579,7 @@
case OP_SPARC_COND_EXC_NEZ:
EMIT_COND_SYSTEM_EXCEPTION_BPR (ins, brnz,
ins->inst_p1);
break;
-<<<<<<< .working
-=======
- case OP_COND_EXC_IOV:
- case OP_COND_EXC_IC:
- EMIT_COND_SYSTEM_EXCEPTION_GENERAL (ins,
opcode_to_sparc_cond (ins->opcode), ins->inst_p1, TRUE, sparc_icc_short);
- break;
->>>>>>> .merge-right.r95529
case OP_IBEQ:
case OP_IBNE_UN:
case OP_IBLT:
@@ -3692,21 +3590,10 @@
case OP_IBGE_UN:
case OP_IBLE:
case OP_IBLE_UN: {
-<<<<<<< .working
-#ifdef SPARCV9
- EMIT_COND_BRANCH_ICC (ins, opcode_to_sparc_cond
(ins->opcode), 1, 1, sparc_icc_short);
-=======
if (sparcv9)
EMIT_COND_BRANCH_PREDICTED (ins,
opcode_to_sparc_cond (ins->opcode), 1, 1);
else
EMIT_COND_BRANCH (ins, opcode_to_sparc_cond
(ins->opcode), 1, 1);
->>>>>>> .merge-right.r95529
-#else
- if (sparcv9)
- EMIT_COND_BRANCH_PREDICTED (ins,
opcode_to_sparc_cond (ins->opcode), 1, 1);
- else
- EMIT_COND_BRANCH (ins, opcode_to_sparc_cond
(ins->opcode), 1, 1);
-#endif
break;
}
@@ -3795,21 +3682,8 @@
sparc_fstod (code, FP_SCRATCH_REG, ins->dreg);
break;
}
-<<<<<<< .working
- case OP_FMOVE:
-#ifdef SPARCV9
- sparc_fmovd (code, ins->sreg1, ins->dreg);
-#else
- sparc_fmovs (code, ins->sreg1, ins->dreg);
- sparc_fmovs (code, ins->sreg1 + 1, ins->dreg + 1);
-#endif
- break;
case OP_ICONV_TO_R4: {
gint32 offset = cfg->arch.float_spill_slot_offset;
-=======
- case OP_ICONV_TO_R4: {
- gint32 offset = mono_spillvar_offset_float (cfg, 0);
->>>>>>> .merge-right.r95529
#ifdef SPARCV9
if (!sparc_is_imm13 (offset)) {
sparc_set (code, offset, sparc_o7);
@@ -3834,13 +3708,8 @@
sparc_fstod (code, FP_SCRATCH_REG, ins->dreg);
break;
}
-<<<<<<< .working
case OP_ICONV_TO_R8: {
gint32 offset = cfg->arch.float_spill_slot_offset;
-=======
- case OP_ICONV_TO_R8: {
- gint32 offset = mono_spillvar_offset_float (cfg, 0);
->>>>>>> .merge-right.r95529
#ifdef SPARCV9
if (!sparc_is_imm13 (offset)) {
sparc_set (code, offset, sparc_o7);
@@ -3900,7 +3769,6 @@
}
break;
}
-<<<<<<< .working
case OP_FCONV_TO_I8:
case OP_FCONV_TO_U8:
/* Emulated */
@@ -3920,8 +3788,6 @@
g_assert_not_reached ();
break;
}
-=======
->>>>>>> .merge-right.r95529
case OP_LCONV_TO_OVF_I:
case OP_LCONV_TO_OVF_I4_2: {
guint32 *br [3], *label [1];
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