On 02/03/2016 06:29 AM, Nick Clifton wrote:
>> directives. objdump produced:
>>
>> rpt r15 { rrcx.w r6
>>
>> Which is almost but not quite correct because it ignores the little
>> detail of the extension word having the ZC bit set.
>
> True - this is really the same bug. GAS is not encoding RRUX correctly,
> so it is not being decoded correctly either.
I didn't phrase that well. The code executes as expected for all the
shift counts I tested but objdump doesn't decode and display the ZC flag.
As for the synthetic instruction thing, there is a table of extended
emulated instructions but rrcx isn't included. When I look at the
instruction encoding, rrcx.w has the same encoding as the non-extended
rrc.w instruction but has a register mode extension word in front of it:
52aa: cf 19 06 10 rpt r15 { rrcx.w r6
52ae: 06 10 rrc r6 ;
52b0: 40 18 06 10 rrcx.w r6
On the other hand, rrux.w gets encoded as a single word instruction from
the new extended instruction group:
52b4: 56 03 rrum #1, r6
I can't find any hint of these details in the documentation. I wonder
where someone writing an assembler is supposed to find this stuff.
(I forgot to include the as version before: 2.24.51.20140505)
The patch might have been of some use to me if I had built as from
sources. It has been a long time since I have done that.
--
David W. Schultz
http://home.earthlink.net/~david.schultz
Returned for Regrooving
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