Hello MarkoC,
To rule out a problem with the ELF file (it looks like it is OK from
the prog output) use the msp430 binutils to disassemble:
msp430-objdump --disassemble main.elf
That should confirm you have some valid code in your ELF.
The flash offsets seem correct for the device you are using.
As you seem to be able to write the vectors (segment 0) perhaps you
could change your .ld file to locate the code in segment 2 (0xfa00), I
know it is not a perminant fix but it should give you more of an idea
of what is wrong.
Benjamin.
On Thu, 11 Aug 2016 04:54:18 -0700 (MST)
MarkoC <marko.cebo...@mors.si> wrote:
> Hello,
>
> I am new to the list. Bought an MSP-FET many years ago, but only got
> to use it now.
>
> I have encountered a strange problem: when I try to flash my chip
> (MSP430F149), only the interrupt vectors get programmed at 0xFFE0,
> the code area at 0x1100 remains blank.
> Are there F149 versions with less memory, so that 0x1100 is not
> populated? Could there be a problem with the .elf file?
>
> I also have an MSP-EXP430G board, there I can flash and run an almost
> identical program successfully.
>
> Below is a screenshot:
>
> mc@bpc2 ~/MSP430/MSP-FET $
> mc@bpc2 ~/MSP430/MSP-FET $
> mc@bpc2 ~/MSP430/MSP-FET $ make
> msp430-gcc -Os -Wall -g -mmcu=msp430f149 -c main.c
> msp430-gcc -Os -Wall -g -mmcu=msp430f149 -o main.elf main.o
> mc@bpc2 ~/MSP430/MSP-FET $ ls -l
> total 44
> -rw-r--r-- 1 mc mc 1285 Aug 11 12:58 fet140_1.c
> -rwxr-xr-x 1 mc mc 8629 Aug 11 12:52 fet140_1.elf
> -rw-r--r-- 1 mc mc 2628 Aug 11 12:52 fet140_1.o
> -rw-r--r-- 1 mc mc 3430 Aug 11 12:41 main.c
> -rwxr-xr-x 1 mc mc 8942 Aug 11 13:22 main.elf
> -rw-r--r-- 1 mc mc 3520 Aug 11 13:22 main.o
> -rw-r--r-- 1 mc mc 182 Aug 10 14:40 Makefile
> -rw-r--r-- 1 mc mc 0 Aug 11 13:21 problem.txt
> mc@bpc2 ~/MSP430/MSP-FET $ mspdebug pif -j -d /dev/parport0
> MSPDebug version 0.22 - debugging tool for MSP430 MCUs
> Copyright (C) 2009-2013 Daniel Beer <dlb...@gmail.com>
> This is free software; see the source for copying conditions. There
> is NO warranty; not even for MERCHANTABILITY or FITNESS FOR A
> PARTICULAR PURPOSE.
>
> Starting JTAG
> JTAG ID: 0x89
> Chip ID: F149
> Chip ID data: f1 49
>
> Available commands:
> = erase isearch power save_raw
> simio alias exit load prog set
> step break fill load_raw read setbreak
> sym cgraph gdb md regs setwatch
> verify delbreak help mw reset setwatch_r
> verify_raw dis hexout opt run
> setwatch_w
>
> Available options:
> color gdb_loop
> enable_bsl_access gdbc_xfer_size
> enable_locked_flash_access iradix
> fet_block_size quiet
> gdb_default_port
>
> Type "help <topic>" for more information.
> Use the "opt" command ("help opt") to set options.
> Press Ctrl+D to quit.
>
> (mspdebug) erase
> Erasing...
> (mspdebug) dis 0x1100 32
> 0x1100:
> 01100: ff ff ff ff AND.B @R15+, 0xffff(R15)
> 01104: ff ff ff ff AND.B @R15+, 0xffff(R15)
> 01108: ff ff ff ff AND.B @R15+, 0xffff(R15)
> 0110c: ff ff ff ff AND.B @R15+, 0xffff(R15)
> 01110: ff ff ff ff AND.B @R15+, 0xffff(R15)
> 01114: ff ff ff ff AND.B @R15+, 0xffff(R15)
> 01118: ff ff ff ff AND.B @R15+, 0xffff(R15)
> 0111c: ff ff ff ff AND.B @R15+, 0xffff(R15)
> (mspdebug) dis 0xffe0 32
> 0xffe0:
> 0ffe0: ff ff ff ff AND.B @R15+, 0xffff(R15)
> 0ffe4: ff ff ff ff AND.B @R15+, 0xffff(R15)
> 0ffe8: ff ff ff ff AND.B @R15+, 0xffff(R15)
> 0ffec: ff ff ff ff AND.B @R15+, 0xffff(R15)
> 0fff0: ff ff ff ff AND.B @R15+, 0xffff(R15)
> 0fff4: ff ff ff ff AND.B @R15+, 0xffff(R15)
> 0fff8: ff ff ff ff AND.B @R15+, 0xffff(R15)
> 0fffc: ff ff ff ff AND.B @R15+, 0xffff(R15)
> (mspdebug) load main.elf
> Writing 144 bytes at 1100 [section: .text]...
> Writing 32 bytes at ffe0 [section: .vectors]...
> Done, 176 bytes total
> (mspdebug) prog main.elf
> Erasing...
> Programming...
> Writing 144 bytes at 1100 [section: .text]...
> Writing 32 bytes at ffe0 [section: .vectors]...
> Done, 176 bytes total
> (mspdebug) dis 0x1100 32
> __wdt_clear_value+0xf00:
> 01100: ff ff ff ff AND.B @R15+, 0xffff(R15)
> 01104: ff ff ff ff AND.B @R15+, 0xffff(R15)
> 01108: ff ff ff ff AND.B @R15+, 0xffff(R15)
> 0110c: ff ff ff ff AND.B @R15+, 0xffff(R15)
> 01110: ff ff ff ff AND.B @R15+, 0xffff(R15)
> 01114: ff ff ff ff AND.B @R15+, 0xffff(R15)
> 01118: ff ff ff ff AND.B @R15+, 0xffff(R15)
> 0111c: ff ff ff ff AND.B @R15+, 0xffff(R15)
> (mspdebug) dis 0xffe0 32
> __ivtbl_16:
> 0ffe0: 70 11 70 11 RRA #0x1170
> 0ffe4: 70 11 70 11 RRA #0x1170
> 0ffe8: 70 11 70 11 RRA #0x1170
> 0ffec: 82 11 SXT SR
> 0ffee: 70 11 70 11 RRA #0x1170
> 0fff2: 70 11 70 11 RRA #0x1170
> 0fff6: 70 11 70 11 RRA #0x1170
> 0fffa: 70 11 70 11 RRA #0x1170
> 0fffe: 00 11 RRA PC
> (mspdebug)
>
>
>
>
> --
> View this message in context:
> http://msp430-gcc-users.1086195.n5.nabble.com/Mspdebug-prog-programs-vectors-not-program-code-tp7409.html
> Sent from the MSP430 gcc - Users mailing list archive at Nabble.com.
>
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