The code generated here does not look right to me.

ReqBits is assigned a value by ReqBits = PL_RequiredStatus & mask;

Later in the module, we have the line
if (ReqBits)

Looking at the generated code for this, there is no test conducted.

                        if (ReqBits)
    c376:   27 24                   jz    $+80        ;abs dst addr 0xc3c6
This is a bad thing!

Build Tools version is

   This is binutils-2.11, gcc-3.2 and msp430-libc.
   Patches from 17 Dec 2002, it is Official RELEASE 1.

Full module follows.

====================================================

0000c302 <PLANT_TickHandler>:

/*****************************************************************************/
/** \brief Tick processing.
* \par Functional Description:
* This is the low level driver for the relays for the RWG outputs.
* It checks the state of the power supply and if shit is about to happen,
it will
* shut off all the relays. If the power is OK it checks for discrepancies
between
* the desired and required output states. If there is and it is not
protecting
* the plant against rapid mode changes, it will instigate a change. Any
change will
* result in all the relays being refreshed. If the relays have not been
checked for
* a while, it will refresh their state.
*
* Not all the possible output functions can be mapped to the relays at any
one
* time. The plant info arrays define which virtual outputs are mapped to
physical
* outputs as well as the ports to which they are mapped.

* \par Usage:
* This function MUST be added to EXEC_InitSW() in exec.c if you want your
software
* packages configured properly!
******************************************************************************/
PUBLIC      void  PLANT_TickHandler(void)
{
    c302:   0b 12                   push  r11         ;
    c304:   0a 12                   push  r10         ;
    c306:   09 12                   push  r9          ;
    c308:   08 12                   push  r8          ;
/* DECLARATIONS */
      UBYTE op;
      UBYTE mask;
      UBYTE ReqBits;
      UBYTE oldDes;
      UBYTE oldAct;
      UBYTE PowerState;
      BOOL  update;


/* ASSERTS    */
/* PROCEDURE  */

      /* Switch all the output drives off and then see if we need to switch
any on later. */
      SYS_PLANT_OutputsDrivesOff();
    c30a:   c2 43 19 00             mov.b #0,   &0x0019     ;subst r3 with
As==00
    c30e:   f2 f0 fc ff 1d 00       and.b #-4,  &0x001d     ;#0xfffc
      oldDes = PL_DesiredStatus;
    c314:   59 42 12 04             mov.b &0x0412,r9  ;src addr 0x0412
      oldAct = PL_ActualStatus;
    c318:   58 42 13 04             mov.b &0x0413,r8  ;src addr 0x0413

      /* if the power module indicates we are about to lose power, switch
everything off */
      PowerState = PWR_RelayPermission((BOOL)PL_UpdateCounter);
    c31c:   5f 42 93 03             mov.b &0x0393,r15 ;src addr 0x0393
    c320:   b0 12 b2 cb             call  #-13390     ;#0xcbb2
      if (PowerState == PWR_FuckOff)
    c324:   4f 93                   cmp.b #0,   r15   ;subst r3 with As==00
    c326:   5a 20                   jnz   $+182       ;abs dst addr 0xc3dc
      {
            /* If we were operating, enforce a complete update of the
outputs */
            if (PL_RequiredStatus != PLANT_ALL_OUTPUTS_OFF)
    c328:   c2 93 95 03             cmp.b #0,   &0x0395     ;subst r3 with
As==00
    c32c:   09 24                   jz    $+20        ;abs dst addr 0xc340
            {
                  PL_State = PLANT_OFF;
    c32e:   c2 43 88 03             mov.b #0,   &0x0388     ;subst r3 with
As==00
                  PL_ModeCounter = 0;
    c332:   82 43 a0 03             mov   #0,   &0x03a0     ;subst r3 with
As==00
                  PL_UpdateCounter = PLANT_NUM_OPS;
    c336:   f2 40 07 00 93 03       mov.b #7,   &0x0393     ;#0x0007
                PL_RequiredStatus = PLANT_ALL_OUTPUTS_OFF;
    c33c:   c2 43 95 03             mov.b #0,   &0x0395     ;subst r3 with
As==00
            }
      }
      else
      {
            /* If the current mode timer has expired, toggle the state and
reload the timer for the state */
            if ((!PL_ModeCounter) || PL_UpdateState)
            {
                  if ((PL_State == PLANT_ON) || (PL_OffTime ==
PLANT_FOREVER_TIME))
                  {
                        PL_State = PLANT_OFF;
                        PL_ModeCounter = PL_OffTime;
                        PL_DesiredStatus = PL_OnStatus &
~PLANT_POWER_OUTPUTS;
                        if (PL_Types[PLANT_APPLIANCE_FAN] !=
PLANT_TYPE_FAN_CONT) PL_DesiredStatus &= ~PLANT_STATUS_FAN;
                  }
                  else
                  {
                        PL_State = PLANT_ON;
                        PL_ModeCounter = PL_OnTime;
                        PL_DesiredStatus = PL_OnStatus;
                  }
                  PL_UpdateCounter = PLANT_NUM_OPS;
                  PL_UpdateState = FALSE;
                  PL_RequiredStatus = PL_DesiredStatus;
            }
      }

      PowerState = PWR_RelayPermission((BOOL)PL_UpdateCounter);
    c340:   5f 42 93 03             mov.b &0x0393,r15 ;src addr 0x0393
    c344:   b0 12 b2 cb             call  #-13390     ;#0xcbb2
    c348:   4d 4f                   mov.b r15,  r13   ;




      /* If the update counter is non-zero, it means we have to change the
state of the outputs */
      if (PL_UpdateCounter)
    c34a:   5e 42 93 03             mov.b &0x0393,r14 ;src addr 0x0393
    c34e:   4e 93                   cmp.b #0,   r14   ;subst r3 with As==00
    c350:   25 24                   jz    $+76        ;abs dst addr 0xc39c
      {
            PL_UpdateCounter--;
    c352:   4f 4e                   mov.b r14,  r15   ;
    c354:   7f 53                   add.b #-1,  r15   ;subst r3 with As==11
    c356:   c2 4f 93 03             mov.b r15,  &0x0393     ;

            mask = EXEC_8BitFlags[PL_UpdateCounter];
    c35a:   5f 42 93 03             mov.b &0x0393,r15 ;src addr 0x0393
    c35e:   5c 4f 28 b9             mov.b -18136(r15),r12   ;

            ReqBits = PL_RequiredStatus & mask;
    c362:   5b 42 95 03             mov.b &0x0395,r11 ;src addr 0x0395
    c366:   4b fc                   and.b r12,  r11   ;
            update = TRUE;
    c368:   5a 43                   mov.b #1,   r10   ;subst r3 with As==01

            /* If the output is mapped then actually drive it otherwise
just update the flags */
            op = PL_OutputMap[PL_UpdateCounter];
    c36a:   5f 4f 98 03             mov.b 920(r15),r15      ;
            if (op != PLANT_NO_OUTPUT)
    c36e:   4f 93                   cmp.b #0,   r15   ;subst r3 with As==00
    c370:   0f 24                   jz    $+32        ;abs dst addr 0xc390
            {
                  /* Check if there is power available to do the change. */
//                if (1)
                  if (PowerState != PWR_Wait)
    c372:   5d 93                   cmp.b #1,   r13   ;subst r3 with As==01
    c374:   2f 24                   jz    $+96        ;abs dst addr 0xc3d4
                  {
                        if (ReqBits)
    c376:   27 24                   jz    $+80        ;abs dst addr 0xc3c6
                        {

SYS_PLANT_OutputDrive(PL_OnOutputDrives[op-1]);
    c378:   f2 f0 fc ff 1d 00       and.b #-4,  &0x001d     ;#0xfffc
    c37e:   7f f3                   and.b #-1,  r15   ;subst r3 with As==11
    c380:   5f 4f 5b c2             mov.b -15781(r15),r15   ;
    c384:   7f 92                   cmp.b #8,   r15   ;subst r2 with As==11
    c386:   18 2c                   jc    $+50        ;abs dst addr 0xc3b8
    c388:   7f f3                   and.b #-1,  r15   ;subst r3 with As==11
    c38a:   d2 4f 28 b9 19 00       mov.b -18136(r15),&0x0019     ;
                        }
                        else
                        {
                        SYS_PLANT_OutputDrive(PL_OffOutputDrives[op-1]);
                        }

                  }

                  /* No power available so stop the update and reset the
update counter */
                  else
            {
                update = FALSE;
                PL_UpdateCounter++;
            }
            }
            if (update)
    c390:   4a 93                   cmp.b #0,   r10   ;subst r3 with As==00
    c392:   04 24                   jz    $+10        ;abs dst addr 0xc39c
            {
                  if (ReqBits) PL_ActualStatus |= mask;
    c394:   4b 93                   cmp.b #0,   r11   ;subst r3 with As==00
    c396:   0c 24                   jz    $+26        ;abs dst addr 0xc3b0
    c398:   c2 dc 13 04             bis.b r12,  &0x0413     ;
                  else PL_ActualStatus &= ~(mask);
            }

      }
      if ((oldDes != PL_DesiredStatus) || (oldAct != PL_ActualStatus))
PL_UpdateDisplay = TRUE;
    c39c:   59 92 12 04             cmp.b &0x0412,r9  ;src addr 0x0412
    c3a0:   03 24                   jz    $+8         ;abs dst addr 0xc3a8
    c3a2:   d2 43 8a 03             mov.b #1,   &0x038a     ;subst r3 with
As==01
    c3a6:   4f 3c                   jmp   $+160       ;abs dst addr 0xc446
    c3a8:   58 92 13 04             cmp.b &0x0413,r8  ;src addr 0x0413
    c3ac:   fa 23                   jnz   $-10        ;abs dst addr 0xc3a2
    c3ae:   4b 3c                   jmp   $+152       ;abs dst addr 0xc446
    c3b0:   7c e3                   xor.b #-1,  r12   ;subst r3 with As==11
    c3b2:   c2 fc 13 04             and.b r12,  &0x0413     ;
    c3b6:   f2 3f                   jmp   $-26        ;abs dst addr 0xc39c
    c3b8:   c2 43 19 00             mov.b #0,   &0x0019     ;subst r3 with
As==00
    c3bc:   7f f3                   and.b #-1,  r15   ;subst r3 with As==11
    c3be:   d2 df 20 b9 1d 00       bis.b -18144(r15),&0x001d     ;
    c3c4:   e5 3f                   jmp   $-52        ;abs dst addr 0xc390
    c3c6:   f2 f0 fc ff 1d 00       and.b #-4,  &0x001d     ;#0xfffc
    c3cc:   7f f3                   and.b #-1,  r15   ;subst r3 with As==11
    c3ce:   5f 4f 60 c2             mov.b -15776(r15),r15   ;
    c3d2:   d8 3f                   jmp   $-78        ;abs dst addr 0xc384
    c3d4:   4a 43                   clr.b r10         ;
    c3d6:   c2 4e 93 03             mov.b r14,  &0x0393     ;
    c3da:   da 3f                   jmp   $-74        ;abs dst addr 0xc390
    c3dc:   82 93 a0 03             cmp   #0,   &0x03a0     ;subst r3 with
As==00
    c3e0:   03 24                   jz    $+8         ;abs dst addr 0xc3e8
    c3e2:   c2 93 89 03             cmp.b #0,   &0x0389     ;subst r3 with
As==00
    c3e6:   ac 27                   jz    $-166       ;abs dst addr 0xc340
    c3e8:   d2 93 88 03             cmp.b #1,   &0x0388     ;subst r3 with
As==01
    c3ec:   15 24                   jz    $+44        ;abs dst addr 0xc418
    c3ee:   b2 90 3c 00 a4 03       cmp   #60,  &0x03a4     ;#0x003c
    c3f4:   11 24                   jz    $+36        ;abs dst addr 0xc418
    c3f6:   d2 43 88 03             mov.b #1,   &0x0388     ;subst r3 with
As==01
    c3fa:   92 42 a2 03 a0 03       mov   &0x03a2,&0x03a0   ;src addr
0x03a2
    c400:   d2 42 96 03 12 04       mov.b &0x0396,&0x0412   ;src addr
0x0396
    c406:   f2 40 07 00 93 03       mov.b #7,   &0x0393     ;#0x0007
    c40c:   c2 43 89 03             mov.b #0,   &0x0389     ;subst r3 with
As==00
    c410:   d2 42 12 04 95 03       mov.b &0x0412,&0x0395   ;src addr
0x0412
    c416:   94 3f                   jmp   $-214       ;abs dst addr 0xc340
    c418:   c2 43 88 03             mov.b #0,   &0x0388     ;subst r3 with
As==00
    c41c:   92 42 a4 03 a0 03       mov   &0x03a4,&0x03a0   ;src addr
0x03a4
    c422:   5e 42 96 03             mov.b &0x0396,r14 ;src addr 0x0396
    c426:   4f 4e                   mov.b r14,  r15   ;
    c428:   7f f0 e1 ff             and.b #-31, r15   ;#0xffe1
    c42c:   c2 4f 12 04             mov.b r15,  &0x0412     ;
    c430:   1f 42 90 03             mov   &0x0390,r15 ;src addr 0x0390
    c434:   ff 90 05 00 02 00       cmp.b #5,   2(r15)      ;#0x0005
    c43a:   e5 27                   jz    $-52        ;abs dst addr 0xc406
    c43c:   7e f0 e0 ff             and.b #-32, r14   ;#0xffe0
    c440:   c2 4e 12 04             mov.b r14,  &0x0412     ;
    c444:   e0 3f                   jmp   $-62        ;abs dst addr 0xc406


       /* EXCEPTIONS */
      return;
}
    c446:   38 41                   pop   r8          ;
    c448:   39 41                   pop   r9          ;
    c44a:   3a 41                   pop   r10         ;
    c44c:   3b 41                   pop   r11         ;
    c44e:   30 41                   ret





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