Ok, I have followed your advice, and here are my findings: I have generated a new macro called SPICSWAIT. This one waits for the TXEPT bit in the U0TCTL register to be done. This one seems to fix the problem.
// #defines for the SPI bus on USART0. These are for non-IRQ rx/tx. #define SPITXWAIT while ( !( IFG1 & UTXIFG0 ) ); // Wait for the TX to finish #define SPIRXWAIT TXBUF0 = 0xFF; SPITXWAIT; while ( !( IFG1 & URXIFG0 ) ); // Wait for the RX to finish #define SPICSWAIT while ( !( U0TCTL & TXEPT ) ); // Wait for TX Empty I have made a few screen shots from the Logic analyzer that clearly identifies which of these works. You can download here: http://kelseyatwork.dyndns.org/mspgcc/SPICSWAIT.jpg http://kelseyatwork.dyndns.org/mspgcc/SPIRXWAIT.jpg http://kelseyatwork.dyndns.org/mspgcc/SPITXWAIT.jpg Here's a snippet from the code that was used to generate these screenshots: TXBUF0 = (unsigned char)address; // Address LSB SPITXWAIT; // USART0 TX buffer ready? (done writing?) // ** Ok to write data, 16 bytes at a time (max) ** TXBUF0 = data; // SPITXWAIT; // USART0 TX buffer ready? (done writing?) // while ( !( IFG1 & URXIFG0 ) ); // Wait for RX while ( !( U0TCTL & TXEPT ) ); // Wait for TX Empty E2DISABLE; // End Write operation I just uncommented one of those last three lines (the SPITXWAIT and the two while loops) for each capture. The files are named w/ the method that was used to generate the waveform. It is quite apparent that the CS line waits until the transmission is complete when the SPICDWAIT macro is used (or equiv). If anyone needs help understanding the waveforms, just ask. Thanks again, and I hope these screen captures help! -Mark -----Original Message----- From: mspgcc-users-ad...@lists.sourceforge.net [mailto:mspgcc-users-ad...@lists.sourceforge.net] On Behalf Of Daniel Néri Sent: Tuesday, March 04, 2003 8:21 PM To: mspgcc-users@lists.sourceforge.net Subject: [Mspgcc-users] Re: UART0 in SPI mode "Mark Stokes" <m.sto...@ieee.org> writes: > The SPITXWAIT; macro should loop until the transmit is complete. Uhm, no. UTXIFG0 is set when TXBUF0 becomes available, i.e. when data is moved from TXBUF0 to the transmitter shift register. So you don't want to use SPITXWAIT immediately before deasserting CS. SPIRXWAIT should work; or use the TXEPT flag in U0TCTL. Regards, -- Daniel Neri d...@mayonnaise.net
